Abstract
A high quality gate insulator is one of the key technologies for improving the performance of Low Temperature Poly Silicon TFTs. We propose an all-new stacked gate insulator, which is prepared with ALD technology for an interfacial layer, and a monopole antenna Plasma Enhanced Chemical Vapor Deposition (PECVD) technology for a secondary layer. The ALD/PECVD reactor, which handles glass substrates of 370 mm×470 mm in size was developed, and its performance was evaluated. Silicon dioxide films were deposited at 400°C with the reactor. Thickness variations of the ALD film and the PECVD film were confirmed to be less than {plus minus}5% and {plus minus}10%, respectively. The stacked insulator, which was composed of the 2nm-ALD film and the 100nm-PECVD film, had an excellent Si/SiO2 interface of 1×1011 cm-2eV-1 and breakdown electrical field of 7.5 MVcm-1.