Abstract
The on-current (Idsat) enhancement in process-simulated <110> nMOSFETs by a tensile strained cap layer is investigated by mechanical stress and Monte Carlo (MC) device simulation. Our MC model is based on an improved semi-empirical analytical two-band model for electrons. This model is found to compare favorably to pseudopotential MC results with some underestimation of the on-current improvement. The MC simulations yield Idsat gains of around 20 % and 10 % for a 60 nm thick cap layer with 2 GPa and 1 GPa intrinsic stress, respectively, with decreasing tendency upon scaling. These current gains are significantly higher than the gains predicted by drift-diffusion simulation with the linear piezoresistance model.