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Über dieses Buch

This book describes the development of a new low-cost medium wavelength IR (MWIR) monolithic imager technology for high-speed uncooled industrial applications. It takes the baton on the latest technological advances in the field of vapor phase deposition (VPD) PbSe-based MWIR detection accomplished by the industrial partner NIT S.L., adding fundamental knowledge on the investigation of novel VLSI analog and mixed-signal design techniques at circuit and system levels for the development of the readout integrated device attached to the detector. In order to fulfill the operational requirements of VPD PbSe, this work proposes null inter-pixel crosstalk vision sensor architectures based on a digital-only focal plane array (FPA) of configurable pixel sensors. Each digital pixel sensor (DPS) cell is equipped with fast communication modules, self-biasing, offset cancellation, analog-to-digital converter (ADC) and fixed pattern noise (FPN) correction. In-pixel power consumption is minimized by the use of comprehensive MOSFET subthreshold operation.



Chapter 1. Introduction

Infrared (IR) thermal imaging is an emerging technology with promising industrial, scientific and medical applications. The recent introduction of uncooled photonic sensors based on vapour phase deposition (VPD) PbSe technologies [1] (Vergara et al., Method of Treating Polycristalline Lead Selenide Infrared Detectors, 2007) opens the door to a new generation of high-speed and low-cost IR vision devices made of monolithic active focal plane arrays (FPAs). This thesis investigates novel complementary metal-oxide-semiconductor (CMOS) circuit design techniques and fully-digital configurable-readout architectures specially conceived to operate these detectors. In this context, the present chapter introduces the motivation, background and trends of current thermography systems, and highlights the main aims of the work.
Josep Maria Margarit

Chapter 2. Frame-Based Smart IR Imagers

The Smart imager approach depicted in Fig. 2.1 is conceived to exploit the pitch limitations of first VPD PbSe detector designs so as to minimize power density, and enhance both dynamic range and NETD\(\times \tau _{img}\) metrics of Sect. 1.​2.
Josep Maria Margarit

Chapter 3. Frame-Free Compact-Pitch IR Imagers

As monolithic VPD PbSe-CMOS integration develops, initial process uniformity concerns become more relaxed and pitch is considerably reduced.
Josep Maria Margarit

Chapter 4. Pixel Test Chips in 0.35- and 0.15-m CMOS Technologies

The next two chapters report the development of both frame-based and frame-free vision sensor cores for uncooled MWIR fast imaging as concrete application examples for the FPA architectures presented in Chaps. 2 and 3.
Josep Maria Margarit

Chapter 5. Imager Test Chips in 2.5-, 0.35- and 0.15-m CMOS Technologies

The experimental validation of any integrated imager design is usually hard to achieve, since it involves not only the proper electrical test procedures of any IC, but also the development of a custom lab setup for optical characterization as well. Due to practical limitations, this optical part of the imager test has to deal with the following challenges:
Josep Maria Margarit

Chapter 6. Conclusions

As a result of the research activities presented in this PhD thesis, the initial working hypothesis, firstly stated in Sect. , have been successively tested and confirmed.
Josep Maria Margarit
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