nach oben

The Journal of Supercomputing

Erschienen in:

05.02.2021

Mapping techniques in multicore processors: current and future trends

verfasst von: Manjari Gupta, Lava Bhargava, S. Indu

Erschienen in: The Journal of Supercomputing | Ausgabe 8/2021

Einloggen

Aktivieren Sie unsere intelligente Suche, um passende Fachinhalte oder Patente zu finden.

search-config

KI-gestützte Suche

Aus

Abstract

Multicore systems are in demand due to their high performance thus making application mapping an important research area in this field. Breaking an application into multiple parallel tasks efficiently and task-core assignment decisions can drastically influence system performance. This has created an urgency to find potent mapping techniques which can handle the complexity of these systems. Task assignment methods are governed by the application model, user-requirements, and architecture model. This paper provides an overview and classification of mapping algorithms that would facilitate graphical interpretation of the known techniques. It details the mapping methodologies along with performance, energy consumption, communication cost, reliability, or thermal management on different target architectures. Upcoming trends and open research areas have also been discussed.

Vorheriger Artikel Analysis of clinical features of large-cell neuroendocrine carcinoma patients guided by chest CT image under deep learning

Sie haben noch keine Lizenz? Dann Informieren Sie sich jetzt über unsere Produkte:

Springer Professional "Wirtschaft"

Online-Abonnement

Mit Springer Professional "Wirtschaft" erhalten Sie Zugriff auf:

über 67.000 Bücher
über 340 Zeitschriften

aus folgenden Fachgebieten:

Bauwesen + Immobilien
Business IT + Informatik
Finance + Banking
Management + Führung
Marketing + Vertrieb
Versicherung + Risiko

Jetzt Wissensvorsprung sichern!

Jetzt informieren

Springer Professional "Technik"

Online-Abonnement

Mit Springer Professional "Technik" erhalten Sie Zugriff auf:

über 67.000 Bücher
über 390 Zeitschriften

aus folgenden Fachgebieten:

Automobil + Motoren
Bauwesen + Immobilien
Business IT + Informatik
Elektrotechnik + Elektronik
Energie + Nachhaltigkeit
Maschinenbau + Werkstoffe

Jetzt Wissensvorsprung sichern!

Jetzt informieren

Springer Professional "Wirtschaft+Technik"

Online-Abonnement

Mit Springer Professional "Wirtschaft+Technik" erhalten Sie Zugriff auf:

über 102.000 Bücher
über 537 Zeitschriften

aus folgenden Fachgebieten:

Automobil + Motoren
Bauwesen + Immobilien
Business IT + Informatik
Elektrotechnik + Elektronik
Energie + Nachhaltigkeit
Finance + Banking
Management + Führung
Marketing + Vertrieb
Maschinenbau + Werkstoffe
Versicherung + Risiko

Jetzt Wissensvorsprung sichern!

Jetzt informieren

Abdi A, Girault A, Zarandi HR (2019) Erpot: a quad-criteria scheduling heuristic to optimize execution time, reliability, power consumption and temperature in multicores. IEEE Trans Parallel Distrib Syst 30:2193–2210CrossRef

Addo-Quaye C (2005) Thermal-aware mapping and placement for 3-D NoC designs. In: Proceedings 2005 IEEE International SOC Conference. IEEE, pp 25–28

Agarwal A, Iskander C, Shankar R (2009) Survey of network on chip (NoC) architectures & contributions. J Eng Comput Archit 3(1):21–27

Anagnostopoulos I, Bartzas A, Kathareios G, Soudris D (2012) A divide and conquer based distributed run-time mapping methodology for many-core platforms. In: 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE). IEEE, pp 111–116

Ananthanarayanan G, Sarangi SR, Balakrishnan M (2016) Leakage power aware task assignment algorithms for multicore platforms. In: 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI). IEEE, pp 607–612

Becchi M, Crowley P (2006) Dynamic thread assignment on heterogeneous multiprocessor architectures. In: Proceedings of the 3rd Conference on Computing Frontiers. ACM, pp 29–40

Benini L, Micheli G (2006) Networks on chips: technology and tools. Amsterdam: Boston

Bhatti ZW, Miniskar NR, Preuveneers D, Wuyts R, Berbers Y, Catthoor F (2012) Memory and communication driven spatio-temporal scheduling on MPSoCs. In: 2012 25th Symposium on Integrated Circuits and Systems Design (SBCCI). IEEE, pp 1–6

Bienia C (2011) Benchmarking modern multiprocessors. Ph.D. thesis, Princeton University

10.

Blagodurov S, Zhuravlev S, Fedorova A (2010) Contention-aware scheduling on multicore systems. ACM Trans Comput Syst (TOCS) 28(4):8CrossRef

11.

Blake G, Dreslinski RG, Mudge T (2009) A survey of multicore processors. IEEE Signal Process Mag 26(6):26–37CrossRef

12.

Bokhari SH (1981) A shortest tree algorithm for optimal assignments across space and time in a distributed processor system. IEEE Trans Softw Eng 6:583–589CrossRef

13.

Bolchini C, Carminati M, Miele A, Das A, Kumar A, Veeravalli B (2013) Run-time mapping for reliable many-cores based on energy/performance trade-offs. In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS). IEEE, pp 58–64

14.

Bolchini C, Carminati M, Mitra T, Muthukaruppan TS (2016) Combined on-line lifetime-energy optimization for asymmetric multicores. In: 2016 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT). IEEE, pp 35–40

15.

Bolotin E, Morgenshtein A, Cidon I, Ginosar R, Kolodny A (2004) Automatic hardware-efficient SoC integration by QoS network on chip. In: Proceedings of the 2004 11th IEEE International Conference on Electronics, Circuits and Systems, 2004. ICECS 2004. IEEE, pp 479–482

16.

Braun TD, Siegel HJ, Beck N, Bölöni LL, Maheswaran M, Reuther AI, Robertson JP, Theys MD, Yao B, Hensgen D et al (2001) A comparison of eleven static heuristics for mapping a class of independent tasks onto heterogeneous distributed computing systems. J Parallel Distrib Comput 61(6):810–837MATHCrossRef

17.

Brooks D, Martonosi M (2001) Dynamic thermal management for high-performance microprocessors. In: Proceedings HPCA Seventh International Symposium on High-Performance Computer Architecture. IEEE, pp 171–182

18.

Cao K, Zhou J, Yin M, Wei T, Chen M (2016) Static thermal-aware task assignment and scheduling for makespan minimization in heterogeneous real-time MPSoCs. In: 2016 International Symposium on System and Software Reliability (ISSSR). IEEE, pp 111–118

19.

Cao S, Salcic Z, Ding Y, Li Z, Wei S, Zhao X (2016) Temperature-aware task scheduling heuristics on network-on-chips. In: 2016 IEEE International Symposium on Circuits and Systems (ISCAS). IEEE, pp 2603–2606

20.

Cao S, Salcic Z, Li Z, Wei S, Ding Y (2016) Temperature-aware multi-application mapping on network-on-chip based many-core systems. Microprocess Microsyst 46:149–160CrossRef

21.

Carlson TE, Heirman W, Eyerman S, Hur I, Eeckhout L (2014) An evaluation of high-level mechanistic core models. ACM Trans Archit Code Optim (TACO) 11(3):1–25

22.

Carvalho E, Calazans N, Moraes F (2007) Heuristics for dynamic task mapping in NoC-based heterogeneous MPSoCs. In: 18th IEEE/IFIP International Workshop on Rapid System Prototyping (RSP’07). IEEE, pp 34–40

23.

Carvalho E, Marcon C, Calazans N, Moraes F (2009) Evaluation of static and dynamic task mapping algorithms in NoC-based mpsocs. In: 2009 International Symposium on System-on-Chip. IEEE, pp 87–90

24.

Castrillon J, Tretter A, Leupers R, Ascheid G (2012) Communication-aware mapping of KPN applications onto heterogeneous MPSoCs. In: Proceedings of the 49th Annual Design Automation Conference. ACM, pp 1266–1271

25.

Chantem T, Xiang Y, Hu XS, Dick RP (2013) Enhancing multicore reliability through wear compensation in online assignment and scheduling. In 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE). IEEE, pp 1373–1378

26.

Chen C-L, Chen Y-H, Hwang T (2017) Communication driven remapping of processing element (PE) in fault-tolerant NoC-based MPSoCs. In: 2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC). IEEE, pp 666–671

27.

Chen W (2009) Task partitioning and mapping algorithms for multi-core packet processing systems. Masters Theses, p 255

28.

Cheng Y, Zhang L, Han Y, Li X (2012) Thermal-constrained task allocation for interconnect energy reduction in 3-D homogeneous MPSoCs. IEEE Trans Very Large Scale Integr VLSI Syst 21(2):239–249CrossRef

29.

Chou C-L, Marculescu R (2008) Contention-aware application mapping for network-on-chip communication architectures. In: 2008 IEEE International Conference on Computer Design. IEEE, pp 164–169

30.

Chou C-L, Ogras UY, Marculescu R (2008) Energy-and performance-aware incremental mapping for networks on chip with multiple voltage levels. IEEE Trans Comput Aided Des Integr Circuits Syst 27(10):1866–1879CrossRef

31.

Chung E-Y, Benini L, De Micheli G (1999) Dynamic power management using adaptive learning tree. In: Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design. IEEE Press, pp 274–279

32.

Chung I-H, Lee C-R, Zhou J, Chou C-Y, Chung Y-C (2012) Scalable communication-aware task mapping algorithms for interconnected multicore systems. In: 2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops & PhD Forum. IEEE, pp 187–192

33.

Coskun AK, Ayala JL, Atienza D, Rosing TS, Leblebici Y (2009) Dynamic thermal management in 3D multicore architectures. In: Proceedings of the Conference on Design, Automation and Test in Europe. European Design and Automation Association, pp 1410–1415

34.

Coskun AK, Rosing TS, Whisnant KA, Gross KC (2008) Temperature-aware MPSoC scheduling for reducing hot spots and gradients. In: Proceedings of the 2008 Asia and South Pacific Design Automation Conference. IEEE Computer Society Press, pp 49–54

35.

Cox M, Singh AK, Kumar A, Corporaal H (2013) Thermal-aware mapping of streaming applications on 3D multi-processor systems. In: The 11th IEEE Symposium on Embedded Systems for Real-time Multimedia. IEEE, pp 11–20

36.

Cruz EH, Diener M, Pilla LL, Navaux PO (2019) Eagermap: a task mapping algorithm to improve communication and load balancing in clusters of multicore systems. ACM Trans Parallel Comput (TOPC) 5(4):17

37.

Curtis-Maury M, Singh K, McKee SA, Blagojevic F, Nikolopoulos DS, De Supinski BR, Schulz M (2007) Identifying energy-efficient concurrency levels using machine learning. In: 2007 IEEE International Conference on Cluster Computing. IEEE, pp 488–495

38.

Das A, Kumar A (2012) Fault-aware task re-mapping for throughput constrained multimedia applications on NoC-based MPSoCs. In: 2012 23rd IEEE International Symposium on Rapid System Prototyping (RSP). IEEE, pp 149–155

39.

Das A, Kumar A, Veeravalli B (2013) Aging-aware hardware-software task partitioning for reliable reconfigurable multiprocessor systems. In: Proceedings of the 2013 International Conference on Compilers, Architectures and Synthesis for Embedded Systems. IEEE Press, pp 1–10

40.

Das A, Kumar A, Veeravalli B (2013) Communication and migration energy aware design space exploration for multicore systems with intermittent faults. In: Proceedings of the Conference on Design, Automation and Test in Europe. EDA Consortium, pp 1631–1636

41.

Das A, Kumar A, Veeravalli B (2013) Reliability-driven task mapping for lifetime extension of networks-on-chip based multiprocessor systems. In: 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE). IEEE, pp 689–694

42.

Das A, Kumar A, Veeravalli B (2014) Artificial intelligence based task mapping and pipelined scheduling for checkpointing on real time systems with imperfect fault detection. In: 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT). IEEE, pp 134–140

43.

Das A, Kumar A, Veeravalli B (2014) Communication and migration energy aware task mapping for reliable multiprocessor systems. Future Generation Computer Systems 30:216–228CrossRef

44.

Das A, Kumar A, Veeravalli B (2014) Energy-aware task mapping and scheduling for reliable embedded computing systems.ACM Trans Embed Comput Syst (TECS) 13(2s):72

45.

Das A, Kumar A, Veeravalli B (2014) Temperature aware energy-reliability trade-offs for mapping of throughput-constrained applications on multimedia MPSoCs. In: 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE). IEEE, pp 1–6

46.

Das A, Kumar A, Veeravalli B, Bolchini C, Miele A (2014) Combined DVFS and mapping exploration for lifetime and soft-error susceptibility improvement in MPSoCs. In: Proceedings of the conference on Design, Automation & Test in Europe. European Design and Automation Association, p 61

47.

Das R, Ausavarungnirun R, Mutlu O, Kumar A, Azimi M (2013) Application-to-core mapping policies to reduce memory system interference in multi-core systems. In: 2013 IEEE 19th International Symposium on High Performance Computer Architecture (HPCA). IEEE, pp 107–118

48.

De Giusti L, Luque E, Chichizola F, Naiouf M, De Giusti A (2009) Amtha: an algorithm for automatically mapping tasks to processors in heterogeneous multiprocessor architectures. In: 2009 WRI World Congress on Computer Science and Information Engineering, vol 2. IEEE, pp 481–485

49.

de Souza Carvalho EL, Calazans NLV, Moraes FG (2010) Dynamic task mapping for MPSoCs. IEEE Des Test Comput 27(5):26–35CrossRef

50.

Derin O, Kabakci D, Fiorin L (2011) Online task remapping strategies for fault-tolerant network-on-chip multiprocessors. In: Proceedings of the Fifth ACM/IEEE International Symposium on Networks-on-Chip. ACM, pp 129–136

51.

Deveci M, Kaya K, Uçar B, Çatalyürek ÜV (2015) Fast and high quality topology-aware task mapping. In: 2015 IEEE International Parallel and Distributed Processing Symposium. IEEE, pp 197–206

52.

Deveci M, Kaya K, Uçar B, Çatalyürek ÜV (2015) Hypergraph partitioning for multiple communication cost metrics: model and methods. J Parallel Distrib Comput 77:69–83CrossRef

53.

Deveci M, Rajamanickam S, Leung VJ, Pedretti K, Olivier SL, Bunde DP, Catalyürek UV, Devine K(2014) Exploiting geometric partitioning in task mapping for parallel computers. In: 2014 IEEE 28th International Parallel and Distributed Processing Symposium. IEEE, pp 27–36

54.

Dhiman G, Rosing TS (2006) Dynamic power management using machine learning. In: Proceedings of the 2006 IEEE/ACM International Conference on Computer-Aided Design. ACM, pp 747–754

55.

Dick RP, Rhodes DL, Wolf W (1998) TGFF: task graphs for free. In: Proceedings of the Sixth International Workshop on Hardware/Software Codesign. (CODES/CASHE’98), pp 97–101

56.

Ding H, Liang Y, Mitra T (2013) Shared cache aware task mapping for WCRT minimization. In: 2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC). IEEE, pp 735–740

57.

Emeretlis A, Theodoridis G, Alefragis P, Voros N. Improvements of a hybrid ILP-CP benders decomposition for mapping and scheduling task DAGs on heterogeneous architectures,Proceedings of 11th Practice and Theory of Automated Timetabling (PATAT 2016), pp 477–479

58.

Faruque A, Abdullah M, Krist R, Henkel J (2008) Adam: run-time agent-based distributed application mapping for on-chip communication. In: Proceedings of the 45th Annual Design Automation Conference. ACM, pp 760–765

59.

Fattah M, Daneshtalab M, Liljeberg P, Plosila J (2013) Smart hill climbing for agile dynamic mapping in many-core systems. In: 2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC). IEEE, pp 1–6

60.

Fattah M, Ramirez M, Daneshtalab M, Liljeberg P, Plosila J (2012) CONA: dynamic application mapping for congestion reduction in many-core systems. In: 2012 IEEE 30th International Conference on Computer Design (ICCD). IEEE, pp 364–370

61.

Ferrandi F, Lanzi PL, Pilato C, Sciuto D, Tumeo A (2010) Ant colony heuristic for mapping and scheduling tasks and communications on heterogeneous embedded systems. IEEE Trans Comput Aided Des Integr Circuits Syst 29(6):911–924CrossRef

62.

Gan Z, Zhang M, Gu Z, Zhang J (2016) Minimizing energy consumption for embedded multicore systems using cache configuration and task mapping. In: 2016 International Conference on Cyber-Enabled Distributed Computing and Knowledge Discovery (CyberC). IEEE, pp 328–334

63.

Giannopoulou G, Stoimenov N, Huang P, Thiele L (2014) Mapping mixed-criticality applications on multi-core architectures. In: Proceedings of the Conference on Design, Automation & Test in Europe. European Design and Automation Association, p 98

64.

Gomatheeshwari B, Selvakumar J (2020) Appropriate allocation of workloads on performance asymmetric multicore architectures via deep learning algorithms. Microprocess Microsyst 73:102996CrossRef

65.

Gopalakrishnan S, Caccamo M (2006) Task partitioning with replication upon heterogeneous multiprocessor systems. In: 12th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS’06). IEEE, pp 199–207

66.

Guo D, Bhuyan LN (2011) A QoS aware multicore hash scheduler for network applications. In: 2011 Proceedings IEEE INFOCOM. IEEE, pp 1089–1097

67.

Gupta M, Bhargava L, Indu S (2020) Artificial neural network based task scheduling for heterogeneous systems. In: 2020 3rd International Conference on Emerging Technologies in Computer Engineering: Machine Learning and Internet of Things (ICETCE), pp 74–79

68.

Gupta M, Bhargava L, Indu S (2020) Dynamic workload-aware DVFs for multicore systems using machine learning. Computing 8:1–23

69.

Hai H, Lei T, Wei W, Songlin S, Xiaojun J (2010) Genetic algorithm for scheduling of interactive tasks in simulation grid. In: 2010 WASE International Conference on Information Engineering, vol 1. IEEE, pp 30–33

70.

Hamedani PK, Hessabi S, Sarbazi -Azad H, Jerger NE (2012) Exploration of temperature constraints for thermal aware mapping of 3D networks on chip. In: 2012 20th Euromicro International Conference on Parallel, Distributed and Network-based Processing. IEEE, pp 499–506

71.

Hartman AS,Thomas DE (2012) Lifetime improvement through runtime wear-based task mapping. In: Proceedings of the Eighth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis. ACM, pp 13–22

72.

Hartman AS, Thomas DE, Meyer BH (2010) A case for lifetime-aware task mapping in embedded chip multiprocessors. In: Proceedings of the Eighth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis. ACM, pp 145–154

73.

He Y, Shao Z, Xiao B, Zhuge Q, Sha E (2003) Reliability driven task scheduling for heterogeneous systems. In: Fifteenth IASTED International Conference on Parallel and Distributed Computing and Systems, vol 1, pp 465–470

74.

Hu J, Marculescu R (2005) Energy-and performance-aware mapping for regular NoC architectures. IEEE Trans Comput Aided Des Integr Circuits Syst 24(4):551–562CrossRef

75.

Huang J, Blech JO, Raabe A, Buckl C, Knoll A (2011) Reliability-aware design optimization for multiprocessor embedded systems. In: 2011 14th Euromicro Conference on Digital System Design. IEEE, pp 239–246

76.

Huang L, Yuan F, Xu Q (2009) Lifetime reliability-aware task allocation and scheduling for MPSoC platforms. In: Proceedings of the Conference on Design, Automation and Test in Europe. European Design and Automation Association, pp 51–56

77.

Hussien AM, Eltawil AM, Amin R, Martin J (2011) Energy aware task mapping algorithm for heterogeneous MPSoC based architectures. In: 2011 IEEE 29th International Conference on Computer Design (ICCD). IEEE, pp 449–450

78.

Jagtap MP (2009) Era of multi-core processors. Power 2(2):2

79.

Jain R, Panda PR, Subramoney S (2016) Machine learned machines: adaptive co-optimization of caches, cores, and on-chip network. In: 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE). IEEE, pp 253–256

80.

Jain R, Panda PR, Subramoney S (2017) A coordinated multi-agent reinforcement learning approach to multi-level cache co-partitioning. In: Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017. IEEE, pp 800–805

81.

Jawandhiya P (2018) Hardware design for machine learning. Int J Artif Intell Appl (IJAIA) 9(1):63–84

82.

Kaida J, Hieda T, Taniguchi I, Tomiyama H, Hara-Azumi Y, Inoue K (2012) Task mapping techniques for embedded many-core SoCs. In: 2012 International SoC Design Conference (ISOCC). IEEE, pp 204–207

83.

Kaida J, Taniguchi I, Hieda T, Tomiyama H (2013) A static task mapping algorithm with dynamic task switching for embedded many-core SoCs. In: 2013 13th International Symposium on Communications and Information Technologies (ISCIT). IEEE, pp 293–297

84.

Kaushik S, Singh AK, Jigang W, Srikanthan T (2011) Run-time computation and communication aware mapping heuristic for NoC-based heterogeneous MPSoC platforms. In: 2011 Fourth International Symposium on Parallel Architectures, Algorithms and Programming. IEEE, pp 203–207

85.

Kaushik S, Singh AK, Srikanthan T (2011) Computation and communication aware run-time mapping for NoC-based MPSoC platforms. In: 2011 IEEE International SOC Conference. IEEE, pp 185–190

86.

Khajekarimi E, Hashemi MR (2012) Communication and congestion aware run-time task mapping on heterogeneous MPSoCs. In: The 16th CSI International Symposium on Computer Architecture and Digital Systems (CADS 2012). IEEE, pp 127–132

87.

Khdr H, Pagani S, Shafique M, Henkel J (2015) Thermal constrained resource management for mixed ILP-TLP workloads in dark silicon chips. In: Proceedings of the 52nd Annual Design Automation Conference. ACM, p 179

88.

Kim J, Lee S, Shin H, Lee Y, Bae H (2011) Effective task mapping and scheduling techniques for heterogeneous multi-core systems based on zone refinement. In: 2011 6th International Conference on Computer Sciences and Convergence Information Technology (ICCIT). IEEE, pp 363–366

89.

Kim S, Kim S, Kil RM, Youn HY (2016) Cgroup-aware load balancing in heterogeneous multi-processor scheduler. In: 2016 International Conference on Information and Communication Technology Convergence (ICTC). IEEE, pp 21–26

90.

Kim YG, Kim M, Kong J, Chung SW. An adaptive thermal management framework for heterogeneous multi-core processors. IEEE Transactions on Computers 69(6):894–906

91.

Kinsy MA, Devadas S (2014) Algorithms for scheduling task-based applications onto heterogeneous many-core architectures. In: 2014 IEEE High Performance Extreme Computing Conference (HPEC). IEEE, pp 1–6

92.

Kofman E, De Simone R (2016) A formal approach to the mapping of tasks on an heterogenous multicore, energy-aware architecture. In: 2016 ACM/IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE). IEEE, pp 153–162

93.

Kolpe T, Zhai A, Sapatnekar SS (2011) Enabling improved power management in multicore processors through clustered DVFs. In: 2011 Design, Automation & Test in Europe. IEEE, pp 1–6

94.

Kumar A, Chakarverty S (2011) Design optimization using genetic algorithm and cuckoo search. In: 2011 IEEE International Conference on Electro/Information technology. IEEE, pp 1–5

95.

Kumar N, Vidyarthi DP (2020) A novel energy-efficient scheduling model for multi-core systems. Cluster Computing, pp 1–24

96.

Lee C, Kim H, Park H-w, Kim S, Oh H, Ha S (2010) A task remapping technique for reliable multi-core embedded systems. In: 2010 IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ ISSS). IEEE, pp 307–316

97.

Lee S, Ro WW (2014) Workload and variation aware thread scheduling for heterogeneous multi-processor. In: The 18th IEEE International Symposium on Consumer Electronics (ISCE 2014). IEEE, pp 1–2

98.

Li S, Ahn JH, Strong RD, Brockman JB, Tullsen DM, Jouppi NP (2009) Mcpat: an integrated power, area, and timing modeling framework for multicore and manycore architectures. In: 2009 42nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), pp 469–480

99.

Liao X, Jigang W, Srikanthan T (2008) A temperature-aware virtual submesh allocation scheme for NoC-based manycore chips. In: Proceedings of the Twentieth Annual Symposium on Parallelism in Algorithms and Architectures. ACM, pp 182–184

100.

Liu G, Park J, Marculescu D (2013) Dynamic thread mapping for high-performance, power-efficient heterogeneous many-core systems. In: 2013 IEEE 31st International Conference on Computer Design (ICCD). IEEE, pp 54–61

101.

Liu Y, Ruan Y, Lai Z, Jing W (2011) Energy and thermal aware mapping for mesh-based NoC architectures using multi-objective ant colony algorithm. In: 2011 3rd International Conference on Computer Research and Development, vol 3. IEEE, pp 407–411

102.

Ma Y, Chantem T, Dick RP, Hu X (2017) Improving system-level lifetime reliability of multicore soft real-time systems. IEEE Trans Very Large Scale Integr VLSI Syst 25(6):1895–1905CrossRef

103.

Madalozzo G, Indrusiak LS, Moraes FG (2016) Mapping of real-time applications on a packet switching NoC-based MPSoC. In: 2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS). IEEE, pp 640–643

104.

Mandelli M, Castilhos G, Sassatelli G, Ost L, Moraes FG (2015) A distributed energy-aware task mapping to achieve thermal balancing and improve reliability of many-core systems. In: 2015 28th Symposium on Integrated Circuits and Systems Design (SBCCI). IEEE, pp 1–7

105.

Mandelli M, Ost L, Carara E, Guindani G, Gouvea T, Medeiros G, Moraes FG (2011) Energy-aware dynamic task mapping for NoC-based MPSoCs. In: 2011 IEEE International Symposium of Circuits and Systems (ISCAS). IEEE, pp 1676–1679

106.

Manna K, Choubey V, Chattopadhyay S, Sengupta I (2014) Thermal variance-aware application mapping for mesh based network-on-chip design using Kernighan-Lin partitioning. In: 2014 International Conference on Parallel, Distributed and Grid Computing. IEEE, pp 274–279

107.

Maqsood T, Ali S, Malik SU, Madani SA (2015) Dynamic task mapping for network-on-chip based systems. J Syst Architect 61(7):293–306CrossRef

108.

Martin C (2014) Multicore processors: challenges, opportunities, emerging trends. In: Proceedings of Embedded World Conference, vol 2014, p 1

109.

Martinez JF, Ipek E (2009) Dynamic multicore resource management: a machine learning approach. IEEE Micro 29(5):8–17CrossRef

110.

Marwedel P, Bacivarov I, Lee C, Teich J, Thiele L, Xu Q, Kouveli G, Ha S, Huang L (2011) Mapping of applications to MPSoCs. In: 2011 Proceedings of the Ninth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ ISSS). IEEE, pp 109–118

111.

Mehran A, Khademzadeh A, Saeidi S (2008) DSM: a heuristic dynamic spiral mapping algorithm for network on chip. IEICE Electron Express 5(13):464–471CrossRef

112.

Mehrara M, Jablin T, Upton D, August D, Hazelwood K, Mahlke S (2009) Multicore compilation strategies and challenges. IEEE Signal Process Mag 26(6):55–63CrossRef

113.

Mello A, Calazans N (2007) Rate-based scheduling policy for QoS flows in networks on chip. In: 2007 IFIP International Conference on Very Large Scale Integration. IEEE, pp 140–145

114.

Meneses-Viveros A, Paredes-López M, Hernández-Rubio E, Gitler I (2020) Energy consumption model in multicore architectures with variable frequency. J Supercomput, pp 1–28

115.

Michailidis PD (2019) An efficient multi-core implementation of the jaya optimisation algorithm. Int J Parallel Emergent Distrib Syst 34(3):288–320CrossRef

116.

Micolet P-J, Smith A, Dubach C (2016) A machine learning approach to mapping streaming workloads to dynamic multicore processors. In: ACM SIGPLAN Notices, vol 51. ACM, pp 113–122

117.

Mo L, Kritikakou A, Sentieys O (2018) Controllable QoS for imprecise computation tasks on DVFs multicores with time and energy constraints. IEEE J Emerg Sel Top Circuits Syst 8(4):708–721CrossRef

118.

Mo L, Kritikakou A, Sentieys O (2019) Approximation-aware task deployment on asymmetric multicore processors. In: The 22nd IEEE/ACM Design, Automation and Test in Europe (DATE 2019)

119.

Möller L, Indrusiak LS, Ost L, Moraes F, Glesner M (2012) Comparative analysis of dynamic task mapping heuristics in heterogeneous NoC-based MPSoCs. In: 2012 International Symposium on System on Chip (SoC). IEEE, pp 1–4

120.

Murali S, Benini L, De Micheli G (2005) Mapping and physical planning of networks-on-chip architectures with quality-of-service guarantees. In: Proceedings of the 2005 Asia and South Pacific Design Automation Conference. ACM, pp 27–32

121.

Murali S, Mutapcic A, Atienza D, Gupta R, Boyd S, Benini L, De Micheli G (2008) Temperature control of high-performance multi-core platforms using convex optimization. In: Proceedings of the conference on Design, Automation and Test in Europe. ACM, pp 110–115

122.

Namazi A, Abdollahi M, Safari S, Mohammadi S (2018) A majority-based reliability-aware task mapping in high-performance homogenous NoC architectures. ACM Trans Embed Comput Syst (TECS) 17(1):28

123.

Niemann R, Marwedel P (1997) An algorithm for hardware/software partitioning using mixed integer linear programming. Des Autom Embed Syst 2(2):165–193CrossRef

124.

Nimer B, Koc H (2013) Improving reliability through task recomputation in heterogeneous multi-core embedded systems. In: 2013 The International Conference on Technological Advances in Electrical, Electronics and Computer Engineering (TAEECE). IEEE, pp 72–77

125.

Nishtala R, Mossé D, Petrucci V (2013) Energy-aware thread co-location in heterogeneous multicore processors. In: Proceedings of the Eleventh ACM International Conference on Embedded Software. IEEE Press, p 21

126.

Oxley MA, Pasricha S, Maciejewski AA, Siegel HJ, Burns PJ (2016) Online resource management in thermal and energy constrained heterogeneous high performance computing. In: 2016 IEEE 14th Intl Conf on Dependable, Autonomic and Secure Computing, 14th Intl Conf on Pervasive Intelligence and Computing, 2nd Intl Conf on Big Data Intelligence and Computing and Cyber Science and Technology Congress (DASC/PiCom/DataCom/CyberSciTech). IEEE, pp 604–611

127.

Pagani S, Chen J-J, Li M (2014) Energy efficiency on multi-core architectures with multiple voltage islands. IEEE Trans Parallel Distrib Syst 26(6):1608–1621CrossRef

128.

Panerati J, Beltrame G (2015) Trading off power and fault-tolerance in real-time embedded systems. In: 2015 NASA/ESA Conference on Adaptive Hardware and Systems (AHS). IEEE, pp 1–8

129.

Panic M, Quinones E, Hernandez C, Abella J, Cazorla FJ (2015) CAP: communication-aware allocation algorithm for real-time parallel applications on many-cores. In: 2015 Euromicro Conference on Digital System Design. IEEE, pp 685–692

130.

Pascual JA, Miguel-Alonso J, Lozano JA (2011) Optimization-based mapping framework for parallel applications. J Parallel Distrib Comput 71(10):1377–1387CrossRef

131.

Pasricha S, Dutt N (2010) On-chip communication architectures: system on chip interconnect. Morgan Kaufmann, San Francisco

132.

Paul S, Chatterjee N, Ghosal P. A permanent fault tolerant dynamic task allocation approach for Network-on-Chip based multicore systems. J Syst Architect 97:287–303

133.

Peress Y. (n.d.).Multi-core design and memory feature selection survey. Retrieved from Florida State University. http://ww2.cs.fsu.edu

134.

Perez Cerrolaza J, Obermaisser R, Abella Ferrer J, Cazorla Almeida FJ, Grüttner K, Agirre I, Ahmadian H, Allende I (2020) Multi-core devices for safety-critical systems: a survey. ACM Comput Surv 53(4):1–8CrossRef

135.

Ranadive P, Vaidya VG (2011) Parallelization tool. http://www.kpit.com/downloads/research-papers/parallelization-tools.pdf

136.

Rijpkema E, Goossens K, Rădulescu A, Dielissen J, van Meerbergen J, Wielage P, Waterlander E (2003) Trade-offs in the design of a router with both guaranteed and best-effort services for networks on chip. IEE Proc Comput Digit Tech 150(5):294–302CrossRef

137.

Rudi A, Bartolini A, Lodi A, Benini L (2014) Optimum: thermal-aware task allocation for heterogeneous many-core devices. In: 2014 International Conference on High Performance Computing & Simulation (HPCS). IEEE, pp 82–87

138.

Sahu PK, Chattopadhyay S (2013) A survey on application mapping strategies for network-on-chip design. J Syst Architect 59(1):60–76CrossRef

139.

Saneei M, Kakoee MR, Afzali-Kusha A (2009) COMRA: an efficient low-energy core mapping and routing path allocation algorithm for heterogeneous NoCs. In: 2009 4th International Design and Test Workshop (IDT). IEEE, pp 1–6

140.

Sarhan H, Eddash O, Raymond M, Wassal A, Ismail Y (2010) Temperature-aware adaptive task-mapping targeting uniform thermal distribution in MPSoC platforms. In: 2010 International Conference on Energy Aware Computing. IEEE, pp 1–3

141.

Schwarzer T, Weichslgartner A, Glaß M, Wildermann S, Brand P, Teich J (2017) Symmetry-eliminating design space exploration for hybrid application mapping on many-core architectures. IEEE Trans Comput Aided Des Integr Circuits Syst 37(2):297–310CrossRef

142.

Sharifi S, Ayoub R, Rosing TS (2012) Tempomp: integrated prediction and management of temperature in heterogeneous MPSoCs. In: Proceedings of the Conference on Design, Automation and Test in Europe. EDA Consortium, pp 593–598

143.

Shen H, Lu J, Qiu Q (2012) Learning based DVFs for simultaneous temperature, performance and energy management. In: Thirteenth International Symposium on Quality Electronic Design (ISQED). IEEE, pp 747–754

144.

Shivle S, Castain R, Siegel HJ, Maciejewski AA, Banka T, Chindam K, Dussinger S, Pichumani P, Satyasekaran P, Saylor W et al (2004) Static mapping of subtasks in a heterogeneous ad hoc grid environment. In: 18th International Parallel and Distributed Processing Symposium, 2004. Proceedings. IEEE, p 110

145.

Silva B, Delbem A, Bonato V, Diniz PC (2015) Runtime mapping and scheduling for energy efficiency in heterogeneous multi-core systems. In: 2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig). IEEE, pp 1–6

146.

Singh AK, Jigang W, Kumar A, Srikanthan T (2010) Run-time mapping of multiple communicating tasks on MPSoC platforms. Procedia Comput Sci 1(1):1019–1026CrossRef

147.

Singh AK, Kumar A, Srikanthan T (2011) A hybrid strategy for mapping multiple throughput-constrained applications on MPSoCs. In: Proceedings of the 14th International Conference on Compilers, Architectures and Synthesis for Embedded Systems. ACM, pp 175–184

148.

Singh AK, Shafique M, Kumar A, Henkel J (2013) Mapping on multi/many-core systems: survey of current and emerging trends. In: 2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC). IEEE, pp 1–10

149.

Singh AK, Shafique M, Kumar A, Henkel J (2015) Resource and throughput aware execution trace analysis for efficient run-time mapping on MPSoCs. IEEE Trans Comput Aided Des Integr Circuits Syst 35(1):72–85CrossRef

150.

Singh AK, Shafique M, Kumar A, Henkel J (2016) Analysis and mapping for thermal and energy efficiency of 3-D video processing on 3-D multicore processors. IEEE Trans Very Large Scale Integr VLSI Syst 24(8):2745–2758CrossRef

151.

Srinivasan J, Adve SV, Bose P, Rivers JA (2004) The case for lifetime reliability-aware microprocessors. In: ACM SIGARCH Computer Architecture News, vol 32. IEEE Computer Society, p 276

152.

Sun C, Shang L, Dick RP (2007) Three-dimensional multiprocessor system-on-chip thermal optimization. In: 2007 5th IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ ISSS). IEEE, pp 117–122

153.

Sun W, Sugawara T (2011) Heuristics and evaluations of energy-aware task mapping on heterogeneous multiprocessors. In: 2011 IEEE International Symposium on Parallel and Distributed Processing Workshops and Phd Forum. IEEE, pp 599–607

154.

Suresh D, Singh AK, Kumar A (2014) A multi-stage thermal management strategy for 3D multicores. In:2014 25nd IEEE International Symposium on Rapid System Prototyping. IEEE, pp 78–84

155.

Tengg A, Klausner A, Rinner B (2007) Task allocation in distributed embedded systems by genetic programming. In: Eighth International Conference on Parallel and Distributed Computing, Applications and Technologies (PDCAT 2007). IEEE, pp 26–30

156.

Wang C, Zhu Y, Jiang J, Liu X, Han X (2015) A dynamic contention-aware application allocation algorithm for many-core processor. In: 2015 IEEE 17th International Conference on High Performance Computing and Communications, 2015 IEEE 7th International Symposium on Cyberspace Safety and Security, and 2015 IEEE 12th International Conference on Embedded Software and Systems. IEEE, pp 308–315

157.

Wang F, Chen Y, Nicopoulos C, Wu X, Xie Y, Vijaykrishnan N (2011) Variation-aware task and communication mapping for MPSoC architecture. IEEE Trans Comput Aided Des Integr Circuits Syst 30(2):295–307CrossRef

158.

Wang G, Song W (2011) Communication-aware task partition and voltage scaling for energy minimization on heterogeneous parallel systems. In: 2011 12th International Conference on Parallel and Distributed Computing, Applications and Technologies. IEEE, pp 327–333

159.

Wang H, Ma J, Tan SX-D, Zhang C, Tang H, Huang K, Zhang Z (2016) Hierarchical dynamic thermal management method for high-performance many-core microprocessors. ACM Trans Des Autom Electron Syst (TODAES) 22(1):1

160.

Wang W, Mishra P, Ranka S (2011) Dynamic cache reconfiguration and partitioning for energy optimization in real-time multi-core systems. In: 2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC). IEEE, pp 948–953

161.

Wang Z, O’Boyle MF (2009) Mapping parallelism to multi-cores: a machine learning based approach. In: ACM Sigplan Notices, vol 44. ACM, pp 75–84

162.

Wikipedia (2019) Metaheuristic—Wikipedia, the free encyclopedia. http://en.wikipedia.org/w/index.php?title=Metaheuristic&oldid=897713973

163.

Woo SC, Ohara M, Torrie E, Singh JP, Gupta A (1995) The splash-2 programs: characterization and methodological considerations. SIGARCH Comput Archit News 23(2):24–36CrossRef

164.

Wu G, Xu Z, Xia Q, Ren J, Xia F (2010) Task allocation and migration algorithm for temperature-constrained real-time multi-core systems. In: 2010 IEEE/ACM Int’l Conference on Green Computing and Communications & Int’l Conference on Cyber, Physical and Social Computing. IEEE, pp 189–196

165.

Wu M-Y, Shu W, Zhang H (2000) Segmented min–min: a static mapping algorithm for meta-tasks on heterogeneous computing systems. In: Proceedings 9th Heterogeneous Computing Workshop (HCW 2000) (Cat. No. PR00556). IEEE, pp 375–385

166.

Xu S, Koren I, Krishna C (2016) Thermal-aware task allocation and scheduling for heterogeneous multi-core cyber-physical systems. In: Proceedings of International Conference on Embedded Systems, Cyber-Physical Systems, and Applications (ESCS), pp 10–16

167.

Xu TC, Leppänen V (2016) An efficient dynamic energy-aware application mapping algorithm for multicore processors. In: 2016 Sixth International Conference on Digital Information Processing and Communications (ICDIPC). IEEE, pp 119–124

168.

Xu X-X, Hu X-M, Chen W-N, Li Y (2016) Set-based particle swarm optimization for mapping and scheduling tasks on heterogeneous embedded systems. In: 2016 Eighth International Conference on Advanced Computational Intelligence (ICACI). IEEE, pp 318–325

169.

Yang L, Liu W, Jiang W, Li M, Yi J, Sha EH-M (2016) Application mapping and scheduling for network-on-chip-based multiprocessor system-on-chip with fine-grain communication optimization. IEEE Trans Very Large Scale Integr VLSI Syst 24(10):3027–3040CrossRef

170.

Yang L, Liu W, Jiang W, Zhang W, Li M, Yi J, Liu D, Sha EH-M (2015) Traffic-aware application mapping for network-on-chip based multiprocessor system-on-chip. In: 2015 IEEE 17th International Conference on High Performance Computing and Communications, 2015 IEEE 7th International Symposium on Cyberspace Safety and Security, and 2015 IEEE 12th International Conference on Embedded Software and Systems. IEEE, pp 571–576

171.

Ye R, Xu Q (2014) Learning-based power management for multicore processors via idle period manipulation. IEEE Trans Comput Aided Des Integr Circuits Syst 33(7):1043–1055CrossRef

172.

Yi J, Liu W, Jiang W, Qin M, Yang L, Liu D, Xiao C, Du L, Sha EH-M (2014) An improved thermal model for static optimization of application mapping and scheduling in multiprocessor system-on-chip. In: 2014 IEEE Computer Society Annual Symposium on VLSI. IEEE, pp 547–552

173.

Yi Y, Han W, Zhao X, Erdogan AT, Arslan T (2009) An ilp formulation for task mapping and scheduling on multi-core architectures. In: Proceedings of the Conference on Design, Automation and Test in Europe. European Design and Automation Association, pp 33–38

174.

Yu Z, Machado P, Zahid A, Abdulghani AM, Dashtipour K, Heidari H, Imran MA, Abbasi QH (2020) Energy and performance trade-off optimization in heterogeneous computing via reinforcement learning. Electronics 9(11):1812CrossRef

175.

Yun Y, Hwang EJ, Kim YH (2015) Energy-efficient design time task mapping algorithm for MPSoC. In: 2015 International SoC Design Conference (ISOCC). IEEE, pp 37–38

176.

Yun Y, Kim YH (2016) Design-time energy optimization for asymmetric multiprocessor system-on-chip. In: 2016 International SoC Design Conference (ISOCC). IEEE, pp 143–144

177.

Zhi-Hua G, Zhi-Min G (2015) WCET-aware task assignment and cache partitioning for wcrt minimization on multi-core systems. In: 2015 Seventh International Symposium on Parallel Architectures, Algorithms and Programming (PAAP). IEEE, pp 143–148

178.

Zhou J, Hu XS, Ma Y, Wei T (2016) Balancing lifetime and soft-error reliability to improve system availability. In: 2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC). IEEE, pp 685–690

179.

Zhou X, Yang J, Xu Y, Zhang Y, Zhao J (2009) Thermal-aware task scheduling for 3D multicore processors. IEEE Trans Parallel Distrib Syst 21(1):60–71CrossRef

180.

Zhu C, Yan Y, Guo P (2020) Investigation of reliability and security of the 3D packaging structure. In: 2020 21st International Conference on Electronic Packaging Technology (ICEPT), pp 1–4

181.

Zhu Z, Chaturvedi V, Singh AK, Zhang W, Cui Y (2017) Two-stage thermal-aware scheduling of task graphs on 3D multi-cores exploiting application and architecture characteristics. In: 2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC). IEEE, pp 324–329

Titel: Mapping techniques in multicore processors: current and future trends
verfasst von: Manjari Gupta
Lava Bhargava
S. Indu
Publikationsdatum: 05.02.2021
Verlag: Springer US
Erschienen in: The Journal of Supercomputing / Ausgabe 8/2021
Print ISSN: 0920-8542
Elektronische ISSN: 1573-0484
DOI: https://doi.org/10.1007/s11227-021-03650-6

Springer Professional

Abstract

Bitte loggen Sie sich ein, um Zugang zu Ihrer Lizenz zu erhalten.

Sie haben noch keine Lizenz? Dann Informieren Sie sich jetzt über unsere Produkte:

Springer Professional "Wirtschaft"

Springer Professional "Technik"

Springer Professional "Wirtschaft+Technik"

Weitere Artikel der Ausgabe 8/2021

Optical wireless communication using camera and RGB display

Optimal fault-tolerant quantum comparators for image binarization

A cloud-based monitoring system for performance analysis in IoT industry

Traffic classification for efficient load balancing in server cluster using deep learning technique

HSAC-ALADMM: an asynchronous lazy ADMM algorithm based on hierarchical sparse allreduce communication

A selfish herd optimization algorithm based on the simplex method for clustering analysis