Micro and Nano Fabrication

MEMS is a key area in the development of microsystems. MEMS makes it possible to engineer tiny microdevices that can process both electrical and nonelectrical signals to produce sensors and actuators. The first MEMS devices appeared in the early 1960s, soon after the invention of the integrated circuit (IC). A tiny pressure sensor, built by sensing strain on an etched thin-silicon diaphragm is an early example. Extensions of this seminal idea and, in fact, forward progress in the MEMS area came about more slowly than was the case for advances in ICs where processes such as CMOS fuelled unprecedented, rapid growth. Focus on-IC processing continues to provide key ideas for progress in MEMS; for example, polycrystalline silicon films, first developed as gate-materials in CMOS, are now formed into movable beams in countless MEMS structures. MEMS developments and their relationships to IC advances have multiplied over the past half century. The “big data” needed to reference all this work is best addressed using modern data-search procedures.

A majority of micro or nano fabrication processes are conducted under partial vacuum conditions, i.e., at pressures orders of magnitude below ambient atmospheric pressure. This is done, among other, to avoid a contamination of films during their deposition. Since the pressure in the vacuum chamber during a pump-down passes through up to 13 orders of magnitude, it is not surprising that rather different gas flow conditions have to be mastered. A look at gas properties and gas flow basics provides an essential understanding for these conditions. A vacuum system reaching ultrahigh vacuum consists of a combination of at least two pumps, a roughing pump working in the viscous flow regime and a high-vacuum pump working down to the molecular flow regime. Typically, roughing pumps are displacement pumps, while high-vacuum pumps are either kinetic transfer pumps or entrapment pumps. General vacuum issues covered are the vacuum seal, vacuum measurement and analysis, as well as desorption and leaks. A discussion of vacuum pump applications concludes this chapter.

Deposition of thin-films used in MEMS and NEMS devices rely on a wide variety of technologies. Physical vapor deposition (PVD) uses physical effects like evaporation or ion bombardment to create thin-films on a substrate by forcing source atoms into a gaseous phase. Chemical vapor deposition (CVD) and similar processes create coatings by a chemical reaction of volatile species by using reaction processes defined by chemical reaction equations. While PVD and CVD are dry processes, for depositing conductive thin-films the substrate may be submerged in an electrically conductive liquid (an electrolyte) and subjected to electrochemical or chemical deposition. Spin-coating and spray-coating are two examples of technologies that lend themselves to creating organic films—a technology widely used in depositing photoresists in photolithography. Dip processes like solgel may be used for the creation of oxide coatings.

Solid surfaces can be etched by wet processes (wet-chemical or electrochemical), dry processes (physical, chemical, or a combination of both), or mechanical processes (without or with a chemical contribution). The wet etch attack may be chemical by a liquid etchant or electrochemical (a reversal of electrochemical deposition) by an electrolyte under the influence of a current. In physical dry etching, the substrate is bombarded by ions (ion beam etching). Chemical etching may either use a plasma, enhancing the chemical attack by dissociating the etchant’s volatile chemical species (plasma etching), or a vapor (vapor phase etching). Physical-chemical processes combine ion bombardment with chemical attack through dissociated chemical species. Mechanical processes are powder blasting and (on the border between mechanical and physical, with and without a chemical component) cluster beam technologies. Subject to etching may be either the substrate material itself (bulk etching/micromachining) or thin-films at the surface (surface etching/micromachining). Particularly bulk micromachining of single crystal silicon takes advantage of etch-limiting crystal planes for constructing three-dimensional patterns in the substrate material.

This chapter covers processes for doping and surface modification of silicon. Technologies described for doping silicon are diffusion and ion implantation, the latter requiring a thermal process to accomplish properly doped material. A process for thermally modifying silicon into the dielectric, amorphous silicon dioxide (SiO₂) is oxidation, using either a dry or a wet process. Due to stoichiometric relationships and differences in density between Si and SiO₂, the film volume increases during the reaction. While doping and surface modification are key technologies in the semiconductor industry, MEMS and NEMS devices also use these technologies, although on a much smaller scale.

The goal of the lithography process is to provide a technique for patterning the various thin-film materials used in MEMS and NEMS substrate fabrication. Most commonly used is mask-based lithography, applying UV light for “printing” a pattern in a photoresist. The mask creating the pattern consists of a transparent mask plate with an opaque pattern on one side. The challenge is how to achieve a minimal feature size, also called line width or in the semiconductor industry “node”. Contact and proximity exposure are near-field methods. Projection exposure is a far-field technique not only taking optimal advantage of optical theory; it may also use demagnification between the mask and its image on the substrate surface, projecting only a single device at a time and exposing the whole substrate surface successively in a “step-and-repeat” sequence. High-resolution alternatives to optical lithography for special applications are X-ray or electron-beam (e-beam) lithography or nonoptical methods like, for instance, dip-pen nanolithography transferring ink or nanoimprint lithography (NIL), mechanically creating a relief pattern.

LIGA is a technology for fabricating high aspect ratio parts. The name is a German acronym for lithography, electrodeposition, and replication. It uses short-wavelength synchrotron radiation to pattern thick resist layers, most commonly made of PMMA or SU-8. The resist pattern serves as a micromold for electrodepositing metal. This thereby generated metal mold is in turn used for fabricating polymer microparts by molding or hot embossing.

Nanotechnology is the fabrication and application of devices (i.e., nanoelectromechanical systems—NEMS) with dimensions below 100 nm in at least one direction. It uses two radically different approaches, top–down and bottom–up processes. Top–down nanofabrication is similar to microfabrication, building patterned layers above each other. Bottom–up nanofabrication, on the other hand, takes advantage of molecular self-assembly, with molecules autonomously “growing” into nanostructures. Typical instances of self-assembly are self-assembled monolayers (SAMs), with the most prominent example, the assembly of thiolate compounds on gold. Directed self-assembly of nanoparticles combines self-organization and a patterning of a substrate to define areas where the self-assembly shall take place. Characteristic self-assembly building blocks are DNA scaffolds, carbon nanotubes (CNTs), and block polymers.

This chapter discusses two distinctive technology aspects related to the wafer itself. The first one is how to maintain a flatness of the layers built up on a wafer, despite the fact that a patterning step typically results in a characteristic surface topography. The second one is how to merge subcomponents built on separate wafers. While the semiconductor industry typically builds up the whole device (i.e., the integrated circuit—IC) on a single wafer, MEMS, with its unique micromachining approaches, quite often creates devices that involve two wafers. For solving these two challenges, two important enabling technologies are being utilized. The first one is chemical-mechanical planarization (CMP) to achieve a flat device surface. The second one is wafer bonding, allowing the merging of subcomponents of a system built up on separate wafers.

A clean substrate surface is an indispensible precondition for both semiconductor and MEMS/NEMS fabrication. It is accomplished by a suitable contamination control, which is one of the essential enabling technologies for fabricating MEMS and NEMS. The two aspects of contamination control are cleaning and working in a clean environment. Cleaning is the process of removing various types of contaminants by an appropriate metrology. There are various cleaning processes used in MEMS and NEMS fabrication. A classic cleaning sequence originally developed in the mid 1960s and still in use today with only minor changes is known as RCA standard clean, where purity is mainly accomplished by cleaning the substrate in hot alkaline and acidic solutions. The clean environment is provided by a cleanroom. In it, the majority of the airborne particles originally contained in the air were removed, for instance by HEPA (high efficiency particulate air) filters.

This chapter presents a case of an actual MEMS device fabrication. The example chosen is an electromagnetic levitation (maglev) system consisting of a stator and a traveler. Due to the high aspect ratio of some of the structures involved, the system may be considered to represent HARMST technology. Stator and traveler are fabricated on separate substrates. The technologies involved are deposition, etching, photolithography, and planarization. Deposition processes applied are sputtering, PECVD, and electrochemical processes. The etching processes used are IBE and wet-chemical etching. Photolithography is conducted with positive, image reversal, and negative resists. Planarization employs CMP.