Mm-wave Circuit Design in 16nm FinFET for 6G Applications

With the ongoing roll-out of the fifth-generation (5G) mobile networks, the industry and academia are already researching the next, sixth-generation (6G) mobile networks. This next generation will further extend the performance boundaries such as an increased data rate, a reduced latency, and improved reliability. The wide adaption of the previous generation mobile networks was enabled by the use of RF-CMOS circuits. The RF circuits of future 6G applications will need to operate at higher frequencies. At the same time, RF-CMOS can continue to follow digital scaling and move toward nano-scale FinFET technology for full integration. Millimeter-wave design in nano-scale FinFET technology comes with new challenges and trade-offs for the front-end designer. In this book, the design of mm-wave circuits for future 6G applications in a FinFET technology will be discussed.

The continued scaling of CMOS technology has made active devices fast enough to operate beyond 100 GHz. This scaling, optimized for digital design, is not just a free lunch but comes with extra challenges for the analog designer. Smaller devices lead to lower breakdown voltages and thus reduced voltage handling. This reduces power handling, linearity, and achievable signal-to-noise ratio. Furthermore, with the advent of FinFET, RF performance seems to flatten. The back end of line (BEOL) also changes with decreasing technology nodes. The amount of metal layers increases at the cost of thinner higher resistive connections, closer to the substrate. Although a thick top metal layer is provided for RF circuits despite the technology node, the connection between transistors and down to the transistors deteriorates. The design of passive components for mm-wave circuits differs greatly from analog and RF design, as well as the use case of these components. In this chapter, the active components, their key performance indicators, and how to use FinFET for mm-wave are the focus of Sect. 2.1. The passive devices are discussed in Sect. 2.2. Finally, in Sect. 2.3, the active and passive components are combined to form the basic widely adopted mm-wave amplifier used above 100 GHz and how to perform basic interstage transformer matching.

All RF circuits use a frequency generating circuit to get the required periodic base signal. The signal is commonly created with a local oscillator (LO) combined in a phase-locked loop (PLL), and the LO signal will be used for downconversion in receivers or upconversion in transmitters. The LO signal will therefore need to satisfy some requirements: (1) the LO signal needs to be pure and has a low phase noise, (2) the LO circuit needs to be able to drive the following circuits, and (3) the frequency needs to be tunable within an acceptable range. This chapter will go over the basics of a voltage-controlled oscillator and the challenges of using a deeply scaled technology at mm-wave frequencies. Two design examples in 16 nm FinFET are given: a fundamental oscillator operating at 150 GHz and a harmonic oscillator operating at 40 GHz with a 3rd harmonic output at 120 GHz.

The power amplifier is one of the main components of the transmitters chain, and the total output power and linearity determine transmission distances and bandwidth efficiency. This chapter starts from the power amplifier basics and goes over the design trade-offs. The challenges of applying these trade-offs at mm-wave frequencies above 100 GHz in a deeply scaled technology are discussed. Finally, in Sect. 4.3, these trade-offs are combined, and the limits are discussed in a 16 nm FinFET D-band PA design example.

In the previous chapter, the basics of mm-wave power amplifiers were covered. CMOS mm-wave power amplifiers above 100 GHz have a fairly low-peak PAE with a further large reduction operating at back-off due to the class-A operation. The use of higher-order modulation schemes will thus result in low-efficiency transmission. The improvement of PA efficiency at power back-off has been the focus of a lot of research in the past. All these known techniques are not always applicable due to either the high required absolute bandwidth or limitation due the high operating frequency. In this chapter, some common efficiency enhancement techniques are discussed that can be applicable for future 6G mm-wave PAs. A simple technique is chosen and demonstrated in a design example of a 16 nm FinFET D-band PA with efficiency enhancement and adjustable amplitude and phase linearization. The PA is combined with a direct-conversion modulator to form a functional D-band transmitter demonstrating up to 44 Gbps transmission.