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Erschienen in:
2007 | OriginalPaper | Buchkapitel
Modeling of Re-Sputtering Induced Bridge of Tungsten Bit-Lines for NAND Flash Memory Cell with 37nm Node Technology
verfasst von : Byungjoon Hwang, Yero Lee, Jeong-Guk Min, Hwakyung Shin, Namsu Lim, Sungjin Kim, Won-Young Chung, Tai-Kyung Kim, Jang-Ho Park, Yun-Kyoung Lee, Donghwa Kwak, Jaekwan Park, Won-Seong Lee
Erschienen in: Simulation of Semiconductor Processes and Devices 2007
Verlag: Springer Vienna
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As the design rule is scaled down, the electrical isolation of metal lines becomes critical. In a high density flash memory with 37nm (pitch=74nm) technology, the threshold voltage shift of ∼0.3V is found to be caused by tungsten micro-bridge between adjacent bit-lines. Simulations and experimental data showed that tungsten re-sputtering is occurred during the deposition of HDP (High Density Plasma)-SiO
2
used as the filling dielectric between tungsten bit-lines. In this paper, the model for the tungsten re-sputtering is presented. The plasma simulations are performed to investigate the effects of process factors of HDP-SiO
2
deposition on the formation of micro-bridge using in-house tool, PIE simulator.