Skip to main content

Über dieses Buch

This book provides various design techniques for switched-capacitor on-chip high-voltage generators, including charge pump circuits, regulators, level shifters, references, and oscillators. Readers will see these techniques applied to system design in order to address the challenge of how the on-chip high-voltage generator is designed for Flash memories, LCD drivers, and other semiconductor devices to optimize the entire circuit area and power efficiency with a low voltage supply, while minimizing the cost.



Chapter 1. System Overview and Key Design Considerations

This chapter describes which categories of voltage converters are covered in this book. Various applications of on-chip high-voltage generators such as memory applications for MNOS, DRAM, NAND Flash, NOR Flash, and phase-change memory, and other electronic devices for motor drivers, white LED drivers, LCD drivers, and energy harvesters are overviewed. System configuration of the on-chip high-voltage generator and key design consideration for the building circuit blocks such as charge pumps, pump regulators, oscillators, level shifters, and voltage references are surveyed.
Toru Tanzawa

Chapter 2. Charge Pump Circuit Theory

This chapter discusses circuit theory of the charge pump circuit. Since it was invented in 1932, various types have been proposed. After several typical types of charge pumps are reviewed, they are compared in terms of the circuit area and the power efficiency. The type that Dickson proposed is found to be the best one as an on-chip generator where the parasitic capacitance is 1–10% of the pump capacitor. Design equations and equivalent circuit models are derived for the charge pump. Using the model, optimizations are discussed to minimize the circuit area under various conditions that the output current, the ramp time, and the power dissipation are given theoretically.
Toru Tanzawa

Chapter 3. Charge Pump State of the Art

This chapter discusses design techniques for implementing charge pumps in integrated circuits. Charge pumps are composed of transfer transistors and capacitors. Realistic design needs to take parasitic components such as threshold voltages of the transfer transistors and parasitic capacitance at each of both terminals into account. In order to decrease the pump area and to increase the current efficiency, some techniques such as threshold voltage canceling and faster clocking are presented. Since the supply current has a frequency component as high as the operating clock, noise reduction technique is another concern for pump design. In addition to design technique for individual pump, system level consideration is also important, since there are usually more than one charge pump in a chip. Area reduction can be also done for multiple charge pump system where all the pumps do not work at the same time. Wide supply voltage range operation and stand-by pump design are also discussed.
Toru Tanzawa

Chapter 4. Pump Control Circuits

This chapter is devoted to individual circuit block, i.e., pump regulators, oscillators, level shifters, and voltage references, to realize on-chip high-voltage generator together with charge pumps.
Toru Tanzawa

Chapter 5. System Design

This chapter provides high voltage generator system design. A gate level hard switching pump model is first presented for designing a single pump block. Multiple pumps are distributed in a die, each of which has wide power ground bus lines. Total area including the charge pump circuits and the power bus lines needs to be paid attention for overall area reduction. Design methodology is shown using an example. Another concern on multiple high voltage generator system design is system level simulation time. Even though the switching pump models are used for system verification, simulation run time is still slow especially for Flash memory where the minimum clock period is 20–50 ns whereas the maximum erase operation period is 1–2 ms. In order to drastically reduce the simulation time, another charge pump model together with a regulator model is described which makes all the nodes in the regulation feedback loop analog to eliminate the hard-switching operation.
Figure 5.1 illustrates on-chip high-voltage generator system and summarizes key discussion in each section. Section 5.1 reviews a hard-switching pump model for designing a single pump cell. The pump outputs the current with an enabling signal high and disconnects the output terminal with the signal low. Thus, two logic states in the signal make the pump hardly turn on or off. The pump model can be implemented in a system together with its pump regulator for system simulation. Section 5.2 expands the model to allow the power line resistance to be included as a design parameter rather than a given condition. Thus, one can determine the power line width as well as the pump parameters such as the number of stages and the pump capacitor to minimize the entire area for the pump and the power lines. Section 5.3 then discusses a behavior model supporting to connect the power ground terminal of each pump with its local power ground lines. In case where power ground lines are shared with other pumps and with high power circuit blocks, there can be interference between one pump and the other blocks. Because lower voltage LSIs have larger sensitivity of power ground noises on performance in terms of speed and variation, the pump behavior model provides high quality on system design. Section 5.4 presents a soft-switching pump model working together with a pump regulator model to avoid a hard-switching for faster system simulation. The soft-switching pump model includes I DD calculation so that one can get the total I DD waveform in entire simulation period. Section 5.5 presents system and circuit design and verification procedures using several models to meet the requirement for the system.
Toru Tanzawa


Weitere Informationen

BranchenIndex Online

Die B2B-Firmensuche für Industrie und Wirtschaft: Kostenfrei in Firmenprofilen nach Lieferanten, Herstellern, Dienstleistern und Händlern recherchieren.



Globales Erdungssystem in urbanen Kabelnetzen

Bedingt durch die Altersstruktur vieler Kabelverteilnetze mit der damit verbundenen verminderten Isolationsfestigkeit oder durch fortschreitenden Kabelausbau ist es immer häufiger erforderlich, anstelle der Resonanz-Sternpunktserdung alternative Konzepte für die Sternpunktsbehandlung umzusetzen. Die damit verbundenen Fehlerortungskonzepte bzw. die Erhöhung der Restströme im Erdschlussfall führen jedoch aufgrund der hohen Fehlerströme zu neuen Anforderungen an die Erdungs- und Fehlerstromrückleitungs-Systeme. Lesen Sie hier über die Auswirkung von leitfähigen Strukturen auf die Stromaufteilung sowie die Potentialverhältnisse in urbanen Kabelnetzen bei stromstarken Erdschlüssen. Jetzt gratis downloaden!