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Journal of Electronic Testing
Erschienen in: Journal of Electronic Testing 6/2013

01.12.2013

Online Testable Approaches in Reversible Logic

verfasst von: N. M. Nayeem, J. E. Rice

Erschienen in: Journal of Electronic Testing | Ausgabe 6/2013

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Abstract

We present an overview and analysis of existing work in the design of online testable reversible logic circuits, as well as propose new approaches for the design of such circuits. We explain how previously proposed approaches are unnecessarily high in overhead and in many cases do not provide adequate fault coverage. Proofs of the correctness of our approaches are provided, and discussions of the advantages and disadvantages of each design approach are given. Experimental results comparing our approaches to existing work are presented as well. Both approaches that we propose have better fault coverage and significantly lower overheads than previous approaches.
Vorheriger Artikel Physics-Based Low-Cost Test Technique for High Voltage LDMOS
Nächster Artikel Autonomous Fault-Tolerant Systems onto SRAM-based FPGA Platforms

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Metadaten
Titel
Online Testable Approaches in Reversible Logic
verfasst von
N. M. Nayeem
J. E. Rice
Publikationsdatum
01.12.2013
Verlag
Springer US
Erschienen in
Journal of Electronic Testing / Ausgabe 6/2013
Print ISSN: 0923-8174
Elektronische ISSN: 1573-0727
DOI
https://doi.org/10.1007/s10836-013-5399-3

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