Optimal design of wafer back-grinding feeding profile considering subsurface damage and productivity

High-performance semiconductor devices and ultra-thin packaging rely on ultra-thin silicon dies. The packaging assembly yield and device reliability are significantly influenced by the quality of ultra-thin wafers and dies. In the semiconductor manufacturing process, a backgrinding process is employed to create ultra-thin wafers. However, abrasive forces can induce subsurface damage (SSD). In particular, SSDs have a negative impact on the mechanical strength and reliability of the die. Additionally, productivity considerations are crucial for industrial applications. Therefore, it is imperative to optimize grinding parameters while considering both SSD and productivity. This paper presents a method for optimizing the polishing parameters of the backgrinding sequence based on the SSD model. Cutting depth and SSD are derived using the analogy between scratch theory and the material removal mechanisms of backgrinding. Subsequently, we calculate an inefficiency score that considers polishing time and SSD to determine the optimal process parameters. Furthermore, we conducted a backgrinding simulation using the optimized parameters to confirm the effects of optimizing the process parameters. To validate the simulation, we performed a grinding sequence using a self-produced back-grinding device and measured the roughness of the ground wafer to compare and verify the trends observed in the simulation.