1992 | OriginalPaper | Buchkapitel
Ordered Binary Decision Diagrams
verfasst von : Kenneth M. Butler, M. Ray Mercer
Erschienen in: Assessing Fault Model and Test Quality
Verlag: Springer US
Aktivieren Sie unsere intelligente Suche, um passende Fachinhalte oder Patente zu finden.
Wählen Sie Textabschnitte aus um mit Künstlicher Intelligenz passenden Patente zu finden. powered by
Markieren Sie Textabschnitte, um KI-gestützt weitere passende Inhalte zu finden. powered by
In order to facilitate a detailed study of the perturbations of various fault models on the normal functioning of a given circuit, it is helpful to have the capacity to find all the tests for each fault in a fault set. One procedure to gather this information would be to inject each fault in the fault set, one at a time, and simulate all possible input patterns, noting when departures from the good machine outputs occur for each fault. An exhaustive method similar to the one just described was proposed in [BEH82]. Obviously, the time required for exhaustive approaches can become prohibitive quickly as circuit sizes grow.