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Erschienen in: Journal of Electronic Testing 1/2022

09.03.2022

Revisit to Histogram Method for ADC Linearity Test: Examination of Input Signal and Ratio of Input and Sampling Frequencies

verfasst von: Yujie Zhao, Kentaroh Katoh, Anna Kuwana, Shogo Katayama, Jianglin Wei, Haruo Kobayashi, Takayuki Nakatani, Kazumi Hatayama, Keno Sato, Takashi Ishida, Toshiyuki Okamoto, Tamotsu Ichikawa

Erschienen in: Journal of Electronic Testing | Ausgabe 1/2022

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Abstract

This paper revisits histogram method for ADC linearity test. Here two methods are proposed for low cost test of histogram method. The first proposal is two-tone sine wave input for code selective histogram method for SAR ADC. In SAR ADC, the DNL of the codes corresponding to the internal DAC output voltages of the MSB bits can be large when the DAC employs a binary-weighted configuration. Therefore, in the proposed method, frequency of appearance of the codes is increased to make the length of the bins relatively long with two-tone sine wave input. It realizes low cost test and high-quality linearity test. The 2nd proposal is decision method of the ratio of the input and sampling frequencies with classical number theory. The proposed method decides the ratio based on metallic ratio or theory of prime numbers. This guarantees random data sampling to get accurate calibration result with relatively small number of histogram data.
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Literatur
1.
Kobayashi H, Kuwana A, Wei J, Zhao Y, Katayama S, Tri TM, Hirai M, Nakatani T, Hatayama K, Sato K, Ishida T (2020) Analog/Mixed-Signal Circuit Testing Technologies in IoT Era. IEEE 15th Int Conf Solid-State and Integrated Circuit Technol Kunming, China
2.
Burns M, Roberts GW (2011) Burns, An Introduction to Mixed-Signal IC Test and Measurement, Oxford Press
3.
Maloberti F (2007) Data Converters, Springer
4.
IEEE (2011) IEEE Standard for Terminology and Test Methods for Analog-to-Digital Converters. In: IEEE Standard 1241–2010 (Revision IEEE Standard 1241–2000)
5.
Jin L, Chen D, Geiger R (2005) A Digital Self-Calibration Algorithm for ADCs Based on Histogram Test Using Low-Linearity Input Signals. IEEE Int Symp Circuits Sys
6.
Flore MG, Negreiros M, Carro L (2004) INL and DNL Estimation based on Noise for ADC Test. IEEE Trans Instrum Meas 53:1391–1395 CrossRef
7.
Blair J (1994) Histogram Measurement of ADC Nonlinearities Using Sine Waves. IEEE Trans Instrum Meas 43:373–383 CrossRef
8.
Ting H-W, Liu B-D, Chang S-J (2008) A Histogram-Based Testing Method for Estimating A/D Converter Performance. IEEE Trans Instrum Meas 57(2):420–427 CrossRef
9.
Goyal S, Chatterjee A, Atia M, Iglehart H, Chen CY, Shenouda B, Khouzam N, Haggag H (2005) Test Time Reduction of Successive Approximation Register A/D Converter by Selective Code Measurement. IEEE Int Test Conference, Austin, TX
10.
Goyal S, Chatterjee A (2008)Linearity Testing of A/D Converters Using Selective Code Measurement. J Electronic Testing, Springer
11.
Yu Z, Chen D (2012) Algorithm for Dramatically Improved Efficiency in ADC Linearity Test," Proc. IEEE Int Test Conf 1–10
12.
Chen T, Jin X, Geiger RL, Chen D (2018) “USER-SMILE: Ultrafast Stimulus Error Removal and Segmented Model Identification of Linearity Errors for ADC Built-In Self-Test,” IEEE Trans. Circuits Syst - Part I 65(7):2059–2069
13.
Laraba A, Stratigopoulos H-G, Mir S, Naudet H (2015) “Exploiting Pipeline ADC Properties for a Reduced-Code Linearity Test Technique,” IEEE Trans. Circuits Syst - Part I 62(10):2391–2400 MATH
14.
Renaud G, Barragan MJ, Laraba A, Stratigopoulos H-G, Mir S, Le-Gall H, Naudet H (2016) A 65nm CMOS Ramp Generator Design and its Application Towards a BIST Implementation of the Reduced-Code Static Linearity Test Technique for Pipeline ADCs. J Electron Test 32:407–421 CrossRef
15.
Feitoza RS, Barragan MJ, Mir S, Dzahini D (2018) Reduced-Code Static Linearity Test of SAR ADCs Using a Built-In Incremental ∑Δ Converter. Proc. IEEE 24th Int Symp On-Line Testing And Robust Sys Design (IOLTS) 29–34
16.
Feitoza RS, Barragan MJ, Dzahini D, Mir S (2019) Reduced-Code Static Linearity Test of Split-Capacitor SAR ADCs Using an Embedded Incremental Sigma Delta Converter. IEEE Trans Device Mater Reliab 19(1):37–45 CrossRef
17.
Huang XL, Chen HI, Huang JL, Chen CY, Kuo-Tsai T, Huang MF, Chou YF, Kwai DM (2012) Testing and Calibration of SAR ADCs by MCT-Based Bit Weight Extraction. IEEE 18th Int Mixed-Signal, Sensors, and Sys Test Workshop 1–4
18.
Hirai M, Tanimoto H, Gendai Y, Yamamoto S, Kuwana A, Kobayashi H (2021) Digital-to-Analog Converter Configuration Based on Non-uniform Current Division Resistive-Ladder. The 36th Int Technical Conf Circuits/Systems, Comp Comm Korea
19.
Hirai M, Tanimoto H, Gendai Y, Yamamoto S, Kuwana A, Kobayashi H (2020) Nonlinearity Analysis of Resistive Ladder-Based Current-Steering Digital-to-Analog Converter. 17th Int SoC Design Conf Yeosu, Korea
20.
Abe F, Kobayashi Y, Sawada K, Kato K, Kobayashi O, Kobayashi H (2014) Low-Distortion Signal Generation for ADC Testing. IEEE Int Test Conf Seattle, WA
21.
Komuro T, Sobukawa S, Sakayori H, Kono M, Kobayashi H (2007) Total Harmonic Distortion Measurement System for Electronic Devices up to 100MHz with Remarkable Sensitivity. IEEE Trans Instrum Meas 56(6):2360–2368 CrossRef
22.
Uemori S, Yamaguchi T, Ito S, Tan Y, Kobayashi H, Takai N, Niitsu K, Ishikawa N (2010) ADC Linearity Test Signal Generation Algorithm. IEEE Asia Pacific Conf Circuits and Sys Kuala Lumpur, Malaysia
23.
Ozawa Y, Kuwana A, Asami K, Kobayashi H (2019) ADC Linearity Testing Using Multi-tone Input Histogram Method. ETG-19–24, ETT-19–24, 9-th IEEJ Workshop in Tochigi and Gunma
24.
Yamamoto S, Sasaki Y, Zhao Y, Wei J, Kuwana A, Sato K, Ishida T, Okamoto T, Ichikawa T, Nakatani T, Tran TM (2021) Metallic Ratio Equivalent-Time Sampling: A Highly Efficient Waveform Acquisition Method. 27th IEEE Int Symposium on On-Line Testing and Robust Sys Design Virtual event
25.
Sasaki Y, Zhao Y, Kuwana A, Kobayashi H (2018) Highly Efficient Waveform Acquisition Condition in Equivalent-Time Sampling System. 27th IEEE Asian Test Symposium, Hefei, Anhui, China
26.
Zhao Y, Kuwana A, Yamamoto S, Sasaki Y, Kobayashi H, Tran TM, Katayama S, Wei J, Nakatani T, Hatayama K, Sato K (2021) Input Signal and Sampling Frequencies Requirements for Efficient ADC Testing with Histogram Method. The 36th Int Technical Conf Circuits/Sys Comp Comm, Korea
27.
Dickson LE (2005) History of the Theory of Numbers, vol. 2, Diophantine Analysis, Dover
Metadaten
Titel
Revisit to Histogram Method for ADC Linearity Test: Examination of Input Signal and Ratio of Input and Sampling Frequencies
verfasst von
Yujie Zhao
Kentaroh Katoh
Anna Kuwana
Shogo Katayama
Jianglin Wei
Haruo Kobayashi
Takayuki Nakatani
Kazumi Hatayama
Keno Sato
Takashi Ishida
Toshiyuki Okamoto
Tamotsu Ichikawa
Publikationsdatum
09.03.2022
Verlag
Springer US
Erschienen in
Journal of Electronic Testing / Ausgabe 1/2022
Print ISSN: 0923-8174
Elektronische ISSN: 1573-0727
DOI
https://doi.org/10.1007/s10836-022-05988-y

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