nach oben

Erschienen in:

2019 | OriginalPaper | Buchkapitel

1. Runtime Adaptability: The Key for Improving Parallel Applications

verfasst von : Arthur Francisco Lorenzon, Antonio Carlos Schneider Beck Filho

Erschienen in: Parallel Computing Hits the Power Wall

Verlag: Springer International Publishing

Einloggen

Aktivieren Sie unsere intelligente Suche, um passende Fachinhalte oder Patente zu finden.

search-config

KI-gestützte Suche

Aus

Abstract

With the increasing complexity of parallel applications, which require more computing power, energy consumption has become an important issue. The power consumption of high-performance computing (HPC) systems is expected to significantly grow (up to 100 MW) in the next years (Dutot et al., Towards energy budget control in HPC. In: IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing, pp. 381–390. IEEE, Piscataway, 2017). Moreover, while general-purpose processors are being pulled back by the limits of the thermal design power (TDP), most of the embedded devices are mobile and heavily dependent on battery (e.g., smartphones and tablets). Therefore, the primary objective when designing and executing parallel applications is not to merely improve performance but to do so with minimal impact on energy consumption.

Sie haben noch keine Lizenz? Dann Informieren Sie sich jetzt über unsere Produkte:

Springer Professional "Wirtschaft+Technik"

Online-Abonnement

Mit Springer Professional "Wirtschaft+Technik" erhalten Sie Zugriff auf:

über 102.000 Bücher
über 537 Zeitschriften

aus folgenden Fachgebieten:

Automobil + Motoren
Bauwesen + Immobilien
Business IT + Informatik
Elektrotechnik + Elektronik
Energie + Nachhaltigkeit
Finance + Banking
Management + Führung
Marketing + Vertrieb
Maschinenbau + Werkstoffe
Versicherung + Risiko

Jetzt Wissensvorsprung sichern!

Jetzt informieren

Springer Professional "Technik"

Online-Abonnement

Mit Springer Professional "Technik" erhalten Sie Zugriff auf:

über 67.000 Bücher
über 390 Zeitschriften

aus folgenden Fachgebieten:

Automobil + Motoren
Bauwesen + Immobilien
Business IT + Informatik
Elektrotechnik + Elektronik
Energie + Nachhaltigkeit
Maschinenbau + Werkstoffe

Jetzt Wissensvorsprung sichern!

Jetzt informieren

Springer Professional "Wirtschaft"

Online-Abonnement

Mit Springer Professional "Wirtschaft" erhalten Sie Zugriff auf:

über 67.000 Bücher
über 340 Zeitschriften

aus folgenden Fachgebieten:

Bauwesen + Immobilien
Business IT + Informatik
Finance + Banking
Management + Führung
Marketing + Vertrieb
Versicherung + Risiko

Jetzt Wissensvorsprung sichern!

Jetzt informieren

Nächstes Kapitel Fundamental Concepts

Beck, A.C.S., Lisbôa, C.A.L., Carro, L.: Adaptable Embedded Systems. Springer, Berlin (2012)

Benesty, J., Chen, J., Huang, Y., Cohen, I.: Pearson Correlation Coefficient, pp. 1–4. Springer, Berlin, (2009). https://doi.org/10.1007/978-3-642-00296-0_5

17.

Butenhof, D.R.: Programming with POSIX Threads. Addison-Wesley Longman Publishing, Boston (1997)

21.

Chandramowlishwaran, A., Knobe, K., Vuduc, R.: Performance evaluation of concurrent collections on high-performance multicore computing systems. In: 2010 IEEE International Symposium on Parallel Distributed Processing (IPDPS), pp. 1–12. IEEE, Piscataway (2010). https://doi.org/10.1109/IPDPS.2010.5470404

22.

Chapman, B., Jost, G., Pas, R.v.d.: Using OpenMP: Portable Shared Memory Parallel Programming (Scientific and Engineering Computation). MIT Press, Cambridge, MA (2007)

34.

Dutot, P.F., Georgiou, Y., Glesser, D., Lefevre, L., Poquet, M., Rais, I.: Towards energy budget control in HPC. In: IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing, pp. 381–390. IEEE, Piscataway (2017)

38.

Gropp, W., Lusk, E., Skjellum, A.: Using MPI (2Nd Ed.): Portable Parallel Programming with the Message-passing Interface. MIT Press, Cambridge (1999)CrossRef

41.

Ham, T.J., Chelepalli, B.K., Xue, N., Lee, B.C.: Disintegrated control for energy-efficient and heterogeneous memory systems. In: IEEE HPCA, pp. 424–435. IEEE, Picataway (2013). https://doi.org/10.1109/HPCA.2013.6522338

47.

Hu, Z., Buyuktosunoglu, A., Srinivasan, V., Zyuban, V., Jacobson, H., Bose, P.: Microarchitectural techniques for power gating of execution units. In: Proceedings of the 2004 International Symposium on Low Power Electronics and Design, ISLPED ’04, pp. 32–37. ACM, New York (2004). https://doi.org/10.1145/1013235.1013249

51.

Joao, J.A., Suleman, M.A., Mutlu, O., Patt, Y.N.: Bottleneck identification and scheduling in multithreaded applications. In: International Conference on Architectural Support for Programming Languages and Operating Systems, pp. 223–234. ACM, New York (2012). https://doi.org/10.1145/2150976.2151001

57.

Karlin, I., Keasler, J., Neely, R.: Lulesh 2.0: updates and changes. pp. 1–9 (2013)

62.

Le Sueur, E., Heiser, G.: Dynamic voltage and frequency scaling: the laws of diminishing returns. In: Proceedings of the 2010 International Conference on Power Aware Computing and Systems, HotPower’10, pp. 1–8. USENIX Association, Berkeley (2010)

63.

Lee, J., Wu, H., Ravichandran, M., Clark, N.: Thread tailor: dynamically weaving threads together for efficient, adaptive parallel applications. ACM SIGARCH Comput. Archit. News 38(3), 270–279 (2010)CrossRef

64.

Levy, H.M., Lo, J.L., Emer, J.S., Stamm, R.L., Eggers, S.J., Tullsen, D.M.: Exploiting choice: Instruction fetch and issue on an implementable simultaneous multithreading processor. In: International Symposium on Computer Architecture, pp. 191–191 (1996). https://doi.org/10.1145/232973.232993

84.

Oboril, F., Tahoori, M.B.: Extratime: Modeling and analysis of wearout due to transistor aging at microarchitecture-level. In: IEEE/IFIP International Conference on Dependable Systems and Networks (DSN 2012), pp. 1–12 (2012). https://doi.org/10.1109/DSN.2012.6263957

85.

Olukotun, K., Hammond, L.: The future of microprocessors. Queue 3(7), 26–29 (2005). https://doi.org/10.1145/1095408.1095418 CrossRef

94.

Quinn, M.: Parallel Programming in C with MPI and OpenMP. McGraw-Hill Higher Education (2004)

95.

Raasch, S.E., Reinhardt, S.K.: The impact of resource partitioning on SMT processors. In: International Conference on Parallel Architectures and Compilation Techniques, pp. 15–25 (2003). https://doi.org/10.1109/PACT.2003.1237998

114.

Subramanian, L., Seshadri, V., Kim, Y., Jaiyen, B., Mutlu, O.: Mise: Providing performance predictability and improving fairness in shared main memory systems. In: IEEE International Symposium on High Performance Computer Architecture, pp. 639–650 (2013)

115.

Suleman, M.A., Qureshi, M.K., Patt, Y.N.: Feedback-driven threading: power-efficient and high-performance execution of multi-threaded workloads on CMPS. SIGARCH Comput. Archit. News 36(1), 277–286 (2008). https://doi.org/10.1145/1353534.1346317 CrossRef

121.

Vogelsang, T.: Understanding the energy consumption of dynamic random access memories. In: Proceedings of the 2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture, MICRO ’43, pp. 363–374. IEEE Computer Society, Washington (2010). https://doi.org/10.1109/MICRO.2010.42

122.

Wall, D.W.: Limits of instruction-level parallelism. In: Proceedings of the Fourth International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS IV, pp. 176–188. ACM, New York (1991). shttps://doi.org/10.1145/106972.106991

Titel: Runtime Adaptability: The Key for Improving Parallel Applications
verfasst von: Arthur Francisco Lorenzon
Antonio Carlos Schneider Beck Filho
Verlag: Springer International Publishing
Buch: Parallel Computing Hits the Power Wall
Print ISBN: 978-3-030-28718-4

Electronic ISBN: 978-3-030-28719-1

Copyright-Jahr: 2019
DOI: https://doi.org/10.1007/978-3-030-28719-1_1

Springer Professional

Abstract

Bitte loggen Sie sich ein, um Zugang zu Ihrer Lizenz zu erhalten.

Sie haben noch keine Lizenz? Dann Informieren Sie sich jetzt über unsere Produkte:

Springer Professional "Wirtschaft+Technik"

Springer Professional "Technik"

Springer Professional "Wirtschaft"