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2015 | OriginalPaper | Buchkapitel

Simulation of Real-Time Multiprocessor Scheduling Using DES

verfasst von : Maxime Chéramy, Anne-Marie Déplanche, Pierre-Emmanuel Hladik

Erschienen in: Simulation and Modeling Methodologies, Technologies and Applications

Verlag: Springer International Publishing

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Abstract

The evaluation of the numerous real-time scheduling algorithms is difficult without a real and complex implementation. Simulation allows to study the schedulers with more flexibility. This paper presents a simulation tool that uses a process-based discrete-event simulation engine. Compared to the other scheduling simulators, it is able to take into account the impact of the caches through statistical models and direct overheads such as context switches and scheduling decisions. The last Section shows how this tool can be used on concrete examples.

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Fußnoten
2
Caches are inclusive if any data contained in a level of cache is contained on the upper level.
 
3
A periodic task releases a job every period time units.
 
Literatur
1.
Zurück zum Zitat Anderson J, Calandrino J, Devi U (2006) Real-time scheduling on multicore platforms. In: Proceedings of the 12th IEEE real-time and embedded technology and applications symposium (RTAS) Anderson J, Calandrino J, Devi U (2006) Real-time scheduling on multicore platforms. In: Proceedings of the 12th IEEE real-time and embedded technology and applications symposium (RTAS)
2.
Zurück zum Zitat Babka V, Libič P, Martinec T, Tůma P (2012) On the accuracy of cache sharing models. In: Proceedings of the third joint WOSP/SIPEW international conference on performance engineering (ICPE) Babka V, Libič P, Martinec T, Tůma P (2012) On the accuracy of cache sharing models. In: Proceedings of the third joint WOSP/SIPEW international conference on performance engineering (ICPE)
3.
Zurück zum Zitat Bastoni A, Brandenburg B, Anderson J (2010) An empirical comparison of global, partitioned, and clustered multiprocessor EDF schedulers. In: Proceedings of the IEEE 31st real-time systems symposium (RTSS) Bastoni A, Brandenburg B, Anderson J (2010) An empirical comparison of global, partitioned, and clustered multiprocessor EDF schedulers. In: Proceedings of the IEEE 31st real-time systems symposium (RTSS)
4.
Zurück zum Zitat Bastoni A, Brandenburg B, Anderson J (2011) Is semi-partitioned scheduling practical? In: Proceedings of the 23rd euromicro conference on real-time systems (ECRTS) Bastoni A, Brandenburg B, Anderson J (2011) Is semi-partitioned scheduling practical? In: Proceedings of the 23rd euromicro conference on real-time systems (ECRTS)
5.
Zurück zum Zitat Berna B, Puaut I (2012) PDPA: period driven task and cache partitioning algorithm for multicore systems. In: Proceedings of the 20th international conference on real-time and network systems (RTNS) Berna B, Puaut I (2012) PDPA: period driven task and cache partitioning algorithm for multicore systems. In: Proceedings of the 20th international conference on real-time and network systems (RTNS)
6.
Zurück zum Zitat Binkert N, Beckmann B, Black G, Reinhardt SK, Saidi A, Basu A, Hestness J, Hower DR, Krishna T, Sardashti S, Sen R, Sewell K, Shoaib M, Vaish N, Hill MD, Wood DA (2011) The gem5 simulator. SIGARCH computer architecture news Binkert N, Beckmann B, Black G, Reinhardt SK, Saidi A, Basu A, Hestness J, Hower DR, Krishna T, Sardashti S, Sen R, Sewell K, Shoaib M, Vaish N, Hill MD, Wood DA (2011) The gem5 simulator. SIGARCH computer architecture news
7.
Zurück zum Zitat Calandrino JM, Leontyev H, Block A, Devi UC, Anderson JH (2006) Litmus RT : a testbed for empirically comparing real-time multiprocessor schedulers. In: Proceedings of the 27th IEEE international real-time systems symposium (RTSS) Calandrino JM, Leontyev H, Block A, Devi UC, Anderson JH (2006) Litmus RT : a testbed for empirically comparing real-time multiprocessor schedulers. In: Proceedings of the 27th IEEE international real-time systems symposium (RTSS)
8.
Zurück zum Zitat Chandarli Y, Fauberteau F, Masson D, Midonnet S, Qamhieh M (2012) Yartiss: a tool to visualize, test, compare and evaluate real-time scheduling algorithms. In: 3rd international workshop on analysis tools and methodologies for embedded and real-time systems (WATERS) Chandarli Y, Fauberteau F, Masson D, Midonnet S, Qamhieh M (2012) Yartiss: a tool to visualize, test, compare and evaluate real-time scheduling algorithms. In: 3rd international workshop on analysis tools and methodologies for embedded and real-time systems (WATERS)
9.
Zurück zum Zitat Chandra D, Guo F, Kim S, Solihin Y (2005) Predicting inter-thread cache contention on a chip multi-processor architecture. In: Proceedings of the 11th international symposium on high-performance computer architecture (HPCA) Chandra D, Guo F, Kim S, Solihin Y (2005) Predicting inter-thread cache contention on a chip multi-processor architecture. In: Proceedings of the 11th international symposium on high-performance computer architecture (HPCA)
10.
Zurück zum Zitat Davis RI, Burns A (2011) A survey of hard real-time scheduling for multiprocessor systems. ACM Comput Surv 43(4) Davis RI, Burns A (2011) A survey of hard real-time scheduling for multiprocessor systems. ACM Comput Surv 43(4)
11.
Zurück zum Zitat Devi U, Anderson J (2005) Tardiness bounds under global EDF scheduling on a multiprocessor. In: Proceedings of the 26th IEEE real-time systems symposium (RTSS) Devi U, Anderson J (2005) Tardiness bounds under global EDF scheduling on a multiprocessor. In: Proceedings of the 26th IEEE real-time systems symposium (RTSS)
12.
Zurück zum Zitat Eklov D, Hagersten E (2010) StatStack: efficient modeling of LRU caches. In: Proceedings of the IEEE international symposium on performance analysis of systems software (ISPASS) Eklov D, Hagersten E (2010) StatStack: efficient modeling of LRU caches. In: Proceedings of the IEEE international symposium on performance analysis of systems software (ISPASS)
13.
Zurück zum Zitat Eklov D, Black-Schaffer D, Hagersten E (2011) Fast modeling of shared caches in multicore systems. In: Proceedings of the 6th international conference on high performance and embedded architectures and compilers (HiPEAC) Eklov D, Black-Schaffer D, Hagersten E (2011) Fast modeling of shared caches in multicore systems. In: Proceedings of the 6th international conference on high performance and embedded architectures and compilers (HiPEAC)
14.
Zurück zum Zitat Fedorova A, Seltzer M, Smith M (2006) Cache-fair thread scheduling for multicore processors. Technical report TR-17-06, Division of Engineering and Applied Sciences, Harvard University Fedorova A, Seltzer M, Smith M (2006) Cache-fair thread scheduling for multicore processors. Technical report TR-17-06, Division of Engineering and Applied Sciences, Harvard University
15.
Zurück zum Zitat Guan N, Stigge M, Yi W, Yu G (2009) Cache-aware scheduling and analysis for multicores. In: Proceedings of the 7th ACM international conference on embedded software (EMSOFT) Guan N, Stigge M, Yi W, Yu G (2009) Cache-aware scheduling and analysis for multicores. In: Proceedings of the 7th ACM international conference on embedded software (EMSOFT)
16.
Zurück zum Zitat Guthaus M, Ringenberg J, Ernst D, Austin T, Mudge T, Brown R (2001) Mibench: a free, commercially representative embedded benchmark suite. In: Proceedings of the IEEE international workshop on workload characterization (WWC-4) Guthaus M, Ringenberg J, Ernst D, Austin T, Mudge T, Brown R (2001) Mibench: a free, commercially representative embedded benchmark suite. In: Proceedings of the IEEE international workshop on workload characterization (WWC-4)
17.
Zurück zum Zitat Harbour MG, Garca JJG, Gutirrez JCP, Moyano JMD (2001) Mast: modeling and analysis suite for real time applications. In: Proceedings of the 13th Euromicro conference on real-time systems (ECRTS) Harbour MG, Garca JJG, Gutirrez JCP, Moyano JMD (2001) Mast: modeling and analysis suite for real time applications. In: Proceedings of the 13th Euromicro conference on real-time systems (ECRTS)
18.
Zurück zum Zitat Hoste K, Eeckhout L (2007) Microarchitecture-independent workload characterization. IEEE Micro 27(3) Hoste K, Eeckhout L (2007) Microarchitecture-independent workload characterization. IEEE Micro 27(3)
19.
Zurück zum Zitat Liu CL, Layland J (1973) Scheduling algorithms for multiprogramming in a hard-real-time environment. J ACM 20 Liu CL, Layland J (1973) Scheduling algorithms for multiprogramming in a hard-real-time environment. J ACM 20
20.
Zurück zum Zitat Liu F, Guo F, Solihin Y, Kim S, Eker A (2008) Characterizing and modeling the behavior of context switch misses. In: Proceedings of the 17th international conference on parallel architectures and compilation techniques (PACT) Liu F, Guo F, Solihin Y, Kim S, Eker A (2008) Characterizing and modeling the behavior of context switch misses. In: Proceedings of the 17th international conference on parallel architectures and compilation techniques (PACT)
21.
Zurück zum Zitat Magnusson P, Christensson M, Eskilson J, Forsgren D, Hallberg G, Hogberg J, Larsson F, Moestedt A, Werner B (2002) Simics: a full system simulation platform. Computer 35(2) Magnusson P, Christensson M, Eskilson J, Forsgren D, Hallberg G, Hogberg J, Larsson F, Moestedt A, Werner B (2002) Simics: a full system simulation platform. Computer 35(2)
22.
Zurück zum Zitat Mattson R, Gecsei J, Slutz D, Traiger I (1970) Evaluation techniques for storage hierarchies. IBM Syst J 9(2) Mattson R, Gecsei J, Slutz D, Traiger I (1970) Evaluation techniques for storage hierarchies. IBM Syst J 9(2)
23.
Zurück zum Zitat Mogul JC, Borg A (1991) The effect of context switches on cache performance. SIGOPS Oper Syst Rev 25(4):299–313 Mogul JC, Borg A (1991) The effect of context switches on cache performance. SIGOPS Oper Syst Rev 25(4):299–313
24.
Zurück zum Zitat Nelissen G, Funk S, Goossens J (2012) Reducing preemptions and migrations in EKG. In: IEEE 18th international conference on embedded and real-time computing systems and applications (RTCSA) Nelissen G, Funk S, Goossens J (2012) Reducing preemptions and migrations in EKG. In: IEEE 18th international conference on embedded and real-time computing systems and applications (RTCSA)
25.
Zurück zum Zitat Radenski A (2006) “python first”: a lab-based digital introduction to computer science. In: Proceedings of the 11th annual SIGCSE conference on innovation and technology in computer science education (ITICSE) Radenski A (2006) “python first”: a lab-based digital introduction to computer science. In: Proceedings of the 11th annual SIGCSE conference on innovation and technology in computer science education (ITICSE)
26.
Zurück zum Zitat Rodriguez-Cayetano M (2011) Design and development of a cpu scheduler simulator for educational purposes using sdl. In: System analysis and modeling: about models. Springer, Berlin, Heidelberg Rodriguez-Cayetano M (2011) Design and development of a cpu scheduler simulator for educational purposes using sdl. In: System analysis and modeling: about models. Springer, Berlin, Heidelberg
28.
Zurück zum Zitat Singhoff F, Legrand J, Nana L, Marcé L (2004) Cheddar: a flexible real time scheduling framework. Ada Lett XXIV(4) Singhoff F, Legrand J, Nana L, Marcé L (2004) Cheddar: a flexible real time scheduling framework. Ada Lett XXIV(4)
29.
Zurück zum Zitat Urunuela R, Déplanche AM, Trinquet Y (2010) Storm a simulation tool for real-time multiprocessor scheduling evaluation. In: Proceedings of the emerging technologies and factory automation (ETFA) Urunuela R, Déplanche AM, Trinquet Y (2010) Storm a simulation tool for real-time multiprocessor scheduling evaluation. In: Proceedings of the emerging technologies and factory automation (ETFA)
Metadaten
Titel
Simulation of Real-Time Multiprocessor Scheduling Using DES
verfasst von
Maxime Chéramy
Anne-Marie Déplanche
Pierre-Emmanuel Hladik
Copyright-Jahr
2015
DOI
https://doi.org/10.1007/978-3-319-11457-6_3