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Erschienen in: Journal of Materials Science: Materials in Electronics 4/2016

15.12.2015

Solid state bonding of silicon chips to copper substrates using silver with cavities

verfasst von: Yuan-Yun Wu, Yi-Ling Chen, Chin C. Lee

Erschienen in: Journal of Materials Science: Materials in Electronics | Ausgabe 4/2016

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Abstract

Silicon (Si) chips were bonded to copper (Cu) substrates using 10 µm silver (Ag) layer as the bonding medium. Neither solder nor flux was used. The bonding was achieved by solid state bonding mechanism. The Ag layer was first plated onto Si chips coated with chromium and gold. The Si chips were then bonded to Cu substrates at 300 °C with a static pressure of 600–1000 psi (6.9 MPa) for 5 min in 0.1 torr vacuum. To assist deformation and flow of the Ag layer during bonding, array of cavities was fabricated in the Ag layer. Because of the cavities, the bonding pressure could be reduced to 600 psi (4.1 MPa). Despite significant coefficient of thermal expansion (CTE) mismatch between Si and Ag, no sample broke. Cross-section SEM images show that Ag layer on Si chips was well bonded to Cu substrates without voids. Shear test was performed on six samples. The breaking force of five samples passes MIL-STD-883H requirement. Fracture analyses reveal that only 6.2–7.5 % of the Ag layer surface was actually bonded to the Cu substrate. There is still room to improve to increase the breaking force.

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Metadaten
Titel
Solid state bonding of silicon chips to copper substrates using silver with cavities
verfasst von
Yuan-Yun Wu
Yi-Ling Chen
Chin C. Lee
Publikationsdatum
15.12.2015
Verlag
Springer US
Erschienen in
Journal of Materials Science: Materials in Electronics / Ausgabe 4/2016
Print ISSN: 0957-4522
Elektronische ISSN: 1573-482X
DOI
https://doi.org/10.1007/s10854-015-4164-z

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