Ausgabe 1-2/2015
Inhalt (8 Artikel)
Progressive and explicit refinement of scheduling for multidimensional data-flow applications using UML MARTE
Calin Glitia, Julien DeAntoni, Frédéric Mallet, Jean-Vivien Millo, Pierre Boulet, Abdoulaye Gamatié
Design methodology for on-chip-based processor debugger
Hyeongbae Park, Jingzhe Xu, Jeong-Hoon Ji, Jusung Park, Gyun Woo
The fast evolving landscape of on-chip communication
Davide Bertozzi, Giorgos Dimitrakopoulos, José Flich, Sören Sonntag
Redundancy optimization for error recovery in digital microfluidic biochips
Mirela Alistar, Paul Pop, Jan Madsen
Application-aware deduplication for performance improvement of flash memory
Joon-Young Paik, Tae-Sun Chung, Eun-Sun Cho
Enabling FPGA routing configuration sharing in dynamic partial reconfiguration
Brahim Al Farisi, Karel Heyse, Karel Bruneel, João Cardoso, Dirk Stroobandt