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Journal of Electronic Testing

Ausgabe 4/2019

Inhalt (13 Artikel)

Editorial

Vishwani D. Agrawal

Open Access

Test Flow Selection for Stacked Integrated Circuits

Breeta SenGupta, Dimitar Nikolov, Assmitra Dash, Erik Larsson

Retention-Aware Refresh Techniques for Reducing Power and Mitigation of Data Retention Faults in DRAM

Shyue-Kung Lu, Hung-Kai Huang, Chun-Lung Hsu, Chi-Tien Sun, Kohei Miyase

16- Layer PCB Channel Design with Minimum Crosstalk and Optimization of VIA and TDR Analysis

A. Kavitha, Ch. Sekhararao Kaitepalli, J. N. Swaminathan, Shaik Ahemedali

Connectivity Test for System in Package Interconnects

JungHo Kang, Kyungsoo Chae, Jaeyoun Jeong

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