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Dieser Artikel untersucht die Optimierung magnetischer Komponenten, insbesondere gekoppelter Spulen (CI) und Common-Mode-Drosseln (CMC), für Hochleistungs-Ladekonverter für Elektrofahrzeuge. Die Studie konzentriert sich auf den Einsatz von Ersatzmodellen, um Designräume effizient zu erforschen und robuste Produktleistungen sicherzustellen. Wichtige Themen sind die Untersuchung einer 125 kW AC / DC-Wandlertopologie, die Entwicklung und Anwendung von Surrogatmodellen für CI und CMC sowie die Identifizierung optimaler magnetischer Bauteildesigns. Der Artikel diskutiert auch die Bedeutung der Berücksichtigung sowohl funktionaler Aspekte als auch kommerziell relevanter Faktoren wie Komponentenvolumen. Die Studie endet mit einer Demonstration des Surrogat-basierten Optimierungsworkflows, der die Effektivität des Ansatzes bei der Erfüllung sowohl funktionaler als auch EMV-Beschränkungen hervorhebt. Zusätzlich präsentiert der Artikel Fotos und 3D-Skizzen von Hardware-Prototypen, die einen visuellen Vergleich der ausgewählten Designs liefern. Die Forschung bietet eine skalierbare und effiziente Methodik für das Design von Magnetbauteilen in komplexen Systemen der Leistungselektronik mit potenziellen Anwendungen in der Automobilindustrie, der Leistungselektronik und den Branchen für erneuerbare Energien.
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Abstract
This work presents a surrogate-based optimization approach for designing magnetic components, specifically a coupled inductor (CI) and a three-phase common-mode choke (CMC), used in an interleaved AC-DC converter for electric vehicle (EV) charging. The goal is to minimize component volume while avoiding core saturation, maximizing magnetic core utilization, and ensuring electromagnetic compatibility (EMC). The simulation workflow integrates analytical modeling, LTSpice circuit simulation, and both 2D magnetostatic and 3D electrostatic finite element analysis. To efficiently navigate the complex design space and reduce computational effort, surrogate models are developed for the magnetic components and the overall circuit. These models enable rapid evaluation of design variants and facilitate multi-objective optimization. The paper outlines the modeling strategies, training procedures, and application of surrogates within a simulation-driven design workflow.
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1 Introduction
The increasing complexity of power electronics and the demand for deeper product understanding are driving new requirements for simulation. The pursuit of higher power density drives the design of magnetic components with reduced volume and maximized core utilization, making nonlinear effects, such as current- or temperature-induced saturation, critical to consider. Maximizing the use of available construction space introduces a broad range of geometric variations that must be evaluated, leading to a substantial increase in simulation runs. A deep under-standing of system behavior, efficient parameter selection, workflow automation across various tools and reusable models are essential. Key steps to enable optimization include sensitivity analysis and reduced-order-modeling (ROM), also called surrogate or metamodel. Modern workflows leverage advanced mathematical methods and machine learning to efficiently explore design spaces and ensure robust product performance.
The literature presents a wide range of design approaches for inductive components in AC–DC power converters. In [1] and [2] , analytical methods based on magnetic circuit theory are employed to design inductive components, including the determination of core reluctance. Another methodology uses behavioral models derived from circuit simulations and fitted to transient measurement data, as shown in [3]. Finite element simulation-based approaches are reported in [4] and [5], using the Ansys Electronics toolchain [6]. A comprehensive survey of modeling techniques with varying levels of complexity for magnetic components is provided in [7]. Furthermore, previous studies as in [8] have established analytical approaches to characterize and design common-mode chokes including the calculations for leakage-inductance prediction, core-saturation avoidance and high-frequency behavior of core material. Other studies have been carried out to characterize high-frequency behavior and modeling of winding parasitics to predict wideband behaviour of common-mode chokes [9, 10]. While these methods offer valuable insights, they primarily address functional parameters such as power ratings, saturation behavior, and thermal performance. In contrast, this work considers essential functional aspects, as well as commercially relevant factors such as component volume (often proportional to cost), to identify a set of feasible designs that balance performance with economic competitiveness.
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The magnetic components investigated in this work are an inverse coupled inductor (CI) and a common-mode choke (CMC), which are used in a multi-level interleaved power converter [11] rated at 125 kW. The CI utilizes a low permeability nanocrystalline core, e.g. Vitroperm 250 [12], to avoid core saturation due to DC imbalances between the legs, whereas the CMC uses a high permeability core, e.g. Vitroperm 550HF [13], to obtain a high inductance required for electromagnetic interference (EMI) filtering [14]. The principal design parameters considered in this work are the CI’s self-inductance Lbase, longitudinal inductance Llong [15], and the CMC’s inductance LCMC. Since the CI’s longitudinal inductance contributes to EMI suppression, it can be exploited to relax the requirements on the CMC [16].
A simulation-based workflow for optimizing the design of the aforementioned magnetic components within a specific converter topology is presented. The approach relies on surrogate models, generated a priori from 2D magnetostatic simulations, to enable efficient design exploration. Section 2 introduces the investigated converter topology and provides an overview of the system- and component-level simulation models, including the EMI evaluation concept. Section 3 describes the development and application of the surrogate models. Section 4 demonstrates their use in identifying optimal magnetic component designs for the target application. Finally, Sect. 5 summarizes the main findings and outlines directions for future work.
2 Topology
This study investigates a 125 kW AC–DC converter developed for electric vehicle (EV) charging applications. The converter employs a two-level interleaved converter (2L-IC) topology to achieve high efficiency and reduced current ripple. Structurally, the topology consists of two two-level converter legs magnetically linked through a coupled inductor (CI). The conducted emission performance of this converter type has been examined in [17]. For non-isolated converters, adherence to electromagnetic compatibility (EMC) requirements is crucial, making the selection of both the CI and CM filters a critical design step.
The overall converter topology and the employed EMC filter architecture are depicted in Fig. 1a. The differential-mode (DM) filter is configured as a two-stage LC network, utilizing the CI’s longitudinal inductance Llong and the CMC’s leakage inductance. The first-stage CX capacitors are dimensioned according to the ripple current requirement, while the second stage CX are selected for enhanced EMC performance. The common-mode (CM) filter is implemented as single stage, consisting of the CMC inductance (LCMC) and Y‑capacitors (CY). The value selected for CY is somewhat limited by safety standards like [18] permitting very low leakage current from line to earth. A suitable range is selected based on guidelines like [19].
Fig. 1
LTSpice schematic of interleaved inverter and subcircuits. a LTSpice schematic of interleaved inverter, highlighting CM parasitic capacitances, CI, CMC, and LISN output. b circuit model of CI, c circuit model of CMC, d CM EMI spectrum at LISN output
Resulting specifications of the converter under investigation are provided in Table 1. For more accurate EMI simulation, typical values for equivalent series inductances (ESL) of CX and CY based on manufacturer data are considered.
Table 1
Converter Specifications
Parameter
Symbol
Value
DC Voltage
\(V_{\mathrm{DC}}\)
750 V
Input Voltage (AC)
\(V_{\mathrm{AC}}\)
400 V
Power Rating
P
125 kW
Power Factor
\(\mathrm{PF}\)
1.0
Rated line current
\(\mathrm{I_\text{line}}\)
180 A
Max. copper current density
–
9 A/mm2
Switching Frequency
\(f_{\mathrm{sw}}\)
33 kHz
Reference Longitudinal Inductance
\(L_{\mathrm{long}}\)
13 µH
Reference Transverse Inductance
\(L_{\mathrm{trans}}\)
4.3 mH
Reference CM Inductance
\(L_{\mathrm{CMC}}\)
3.8 mH
Line-to-line capacitance
\(C_{\mathrm{X}}\)
15 µF per phase
Max. line-to-earth capacitance
\(C_{\mathrm{Y}}\)
1 µF in total
Equivalent Series Inductance—CX
\(ESL-{C_{\mathrm{X}}}\)
20 nH
Equivalent Series Inductance—CY
\(ESL-{C_{\mathrm{Y}}}\)
25 nH
Core Material—CI
–
VP 250
Core Material—CMC
–
VP 550 HF
Figure 1 shows the LTSpice model and subcircuits used in this work. Parasitic capacitances of the power module relevant for CM are highlighted in red. Detailed views of the parametrized subcircuits of inverse coupled inductor (orange box) and CMC (green box) are given by respective subfigures (b) and (c). The conducted emission spectrum exemplified by Fig. 1d is measured at the EMI output of the 3‑phase LISN (blue box).
The following subsections Sect. 2.1 to Sect. 2.3 give more details on Fig. 1b to Fig. 1d.
2.1 Coupled inductor (CI)
The inverse coupled inductor (CI) under consideration employs a toroidal ring core characterized by the design parameters \(x_0,...,x_5\), as shown in Fig. 2.
Fig. 2
Toroidal coupled inductor 2D cross section with geometry parameters. x0, x1, x2 are the inner core radius, core width, and core height, respectively, while \(x_3, x_4, x_5\) are number of turns, wire thickness, and coil coverage angle
This work considers edge-wound inductors with flat wire winding. Such offer several advantages compared to classic round wire winding, including a better heat dissipation that allows a higher current density and reduce the dimensions of the component.
The converter’s power rating results in a nominal line current of 180 A, which each coil winding of the CI and CMC must carry. Combined with the maximum permissible current density in copper, this requirement dictates a minimum conductor diameter for the magnetic components, i.e. the product of wire height x4 with its maximum possible thickness, which is function of \(x_0, x_3, x_5\).
The volume of the complete component including wire height (simplified as cylinder) is
Apart from achieving required inductive parameters for EMC, an optimal CI design limits core losses, copper losses and avoids core saturation. All three occur due to longitudinal- and transverse-mode currents in the CI. Conventional design approaches for the investigated topology rely on analytical models and typically employ ferrite cores. Although ferrite materials offer low core losses at high switching frequencies, their relatively low saturation flux density Bsat—generally between 0.3 T and 0.4 T—limits their applicability. Alternatively, nano-crystalline cores such as VP250 [12] offer much higher Bsat of 1.2 T while having similar core losses as compared to ferrite cores.
Following the approach presented in [15], the common equivalent circuit of an inverse coupled inductor in the top of Fig. 1b can be split into a leakage part, termed longitudinal inductance Llong and coupled part, termed Ltrans. This model captures the magnetic coupling behavior and allows straightforward integration into SPICE-based simulation environments.
The interpretation is handy for EMC considerations, as is displays that Llong carries the load current IL towards the AC grid, thus the leakage inductance helps to attenuate conducted EMI noise. On the other hand, only the transverse current IT generates a magnetic flux within the core according (5). If not properly accounted for, this flux may lead to core saturation and excess core losses. Therefore, Ltrans has to be sufficiently high to limit IT, hence avoiding saturation, whereas Llong has to be sufficiently high to keep the ripple of IL within EMI limits. The mentioned currents are displayed in Fig. 13.
The values of Llong and Ltrans are derived from the base winding inductances \(L_\mathrm{base}=L_{11}=L_{22}\) and the coupling coefficient k by (2) and (3). Values of Lbase, Llong and k are geometry-dependent. The latter two are obtained through 2D magnetostatic simulations performed in Ansys Maxwell [6], using the cross section of Fig. 2. Lbase is derived analytically with (4).
The self-inductance of an toroidal inductor with rectangular cross-section becomes (4) using the convention from Fig. 2. The core magnetic flux density can be expressed as (5). Note that both quantities are function of the core material property \(\mu_r\) (4000 for VP250). Hence, the surrogate output described in Section 3.2 inherently contains the permeability value it was trained with. However, the output can be scaled to consider another material (or frequency-dependent \(\mu_r\)). In contrary, the coupling factor k is largely material independent, as long as the inductor remains strongly coupled.
Nano-crystalline materials such as VP550HF [13] (Bsat = 1.2 T) offer even lower core losses than the VP250 selected for CI, but have very high permeability values which is not desirable for a CI as even small DC components in transverse current can lead to high DC flux in the core [20]. In a CMC however, the common-mode current ICM which saturates the core is much smaller than IT in the CI. Hence, high-permeability nano-crystalline is a good material choice to achieve high CM attenuation despite small core volume.
Design objectives of the CMC are to achieve the required CM attenuation within a certain frequency band by providing sufficient LCMC with suitable winding capacitance. The choke should be as small as possible, while avoiding core saturation. Though, as the actual CM current ICM in the CMC depends on the circuit configuration on the value of LCMC itself, it is necessary to evaluate it for each CMC and circuit design individually.
The CMC type considered in this work is again a toroid with edge-wound flat wire, with same current density constraint as the CI. The model is described by Fig. 3.
Fig. 3
CMC model: a 2D cross-section with geometry parameters. b Visualization of magnetic flux density Bcore from magnetostatic simulation (at reference ICM = 1 A)
Low-frequency CM attenuation can be simulated by respecting the chokes main inductance only, but for broadband EMI considerations, the parasitic winding capacitance has to be included in the equivalent circuit model, see Fig. 4. The equivalent CM (and DM) capacitance is obtained from 3D electrostatic simulation with a parametrized model as shown in Fig. 17. This is of course more effort than 2D cross-section simulation, thus was only done for candidate final designs, see Sect. 4.
Fig. 4
CM impedance of CMC equivalent circuit from Fig. 1c derived from 3D simulation of the reference design, see Fig. 17. Dashed trace shows measurement. The simulation model does not respect frequency-dependent permeability
The IEC 61851-21-2:2018 [21] standard defines the EMC requirements for off-board electric vehicle charging systems, including conducted emission limits. However, the actual emission limit lines and charts are not publicly available due to copyright restrictions. Hence, for this work limit lines similar as in the technical report [22] were used, but as PK instead of QP limits, and extended with arbitrary limit lines for demonstration of the workflow, see Table 2.
Table 2
Fictitious PK-detector AC-side common-mode emission limits applied in this work.
Name
vio1
vio2
vio3
vio4
Frequency range
100–200 kHz
250–500 kHz
0.51–5 MHz
6–30 MHz
Limit
92 dBµV
85 dBµV
70 dBµV
55 dBµV
Electromagnetic interferences (EMI) are measured and rated with an EMI receiver according CISPR 16-1‑1 standard [23]. It features several detectors to rate spectral components of a signal, but this work focuses on the measurements from the peak detector (PK), as these are primarily used for filter design. For grid-tied inverters [17] showed that an DFT does not correctly depict modulation of switching harmonics with the 50 Hz mains signal which results in too low emission readings. Thus, the Short-Time-Fourier transform (STFT) algorithm [24] emulating the working principle of an actual EMI receiver was implemented in Python as exemplified in [25].
For brevity, this work focuses on CM emission and CM filter design. The CM conducted emission spectrum is evaluated from the voltages on the 3‑phase LISN circuit EMI output (see Fig. 1a) by application of (6).
The surrogate models in this work are data-driven approximations of the input-output relationship of a system. They are trained using a limited set of high-fidelity simulations and then used to predict results for new inputs. They are used to reduce computational cost and accelerate design and optimization processes, avoiding a very high number of electromagnetic simulations and very time-consuming transient circuit simulations. By thoughtfully selecting input parameters, defining an appropriate training range, and choosing scalable output quantities, surrogate models allow rapid re-evaluation whenever design parameters are modified.
The surrogate models presented in this work were created with Ansys OptiSlang [26], using the modeling approach presented in [27] for CI and CMC. For optimization over all trained surrogates, the models were exported as standardized functional mockup units (FMU), such that they are processable with standard Python libraries.
3.1 Circuit
The circuit presented in Fig. 1 was implemented in LTspice [28] with the quantities of Table 3 as changeable parameters. Because Ansys OptiSlang cannot directly invoke LTspice, the parameters were set via Python using the pyLTSpice library [29] and the Python script was interfaced with OptiSlang. This way the latter can be used to handle the surrogate creation, i.e. choosing sampling plan, meta-modeling, validation of prognosis accuracy, etc. Surrogate training with Ansys OptiSlang required about 300 circuit simulations, with each run taking about 2 min. For the training, a generic parametric subcircuit of the CMC was used, based on scaled measured values of the reference choke.
Table 3
Parameter ranges for circuit surrogate training (chosen by experience). CX was at a fixed value, as it has no impact on CM emissions. CY was varied only in three discrete steps.
Ltrans
Llong
LCMC
CY
CX
[1, 7] mH
[3, 15] µH
[3, 8] mH
100/200/330 nF
15 µF
Fig. 5 presents the usage of the circuit surrogate after training. Any combination of input parameters within the training range of Table 3 can be requested. (The CI geometry parameters allow much higher Ltrans, but the circuit surrogate training range was limited to reasonable values.).
Design goals for the CI are to achieve the specified self-inductance Lbase (approximately equal to Ltrans) and the longitudinal inductance Llong required by the system, while minimizing volume and ensuring the capability to carry currents associated with these inductance values, thus maximizing core utilization.
The magnetic characteristics of the CI are obtained through simulation and analytical estimation as described above in Sect. 2.1. The modeling approach has been developed in [27], but realized with Ansys OptiSlang for this work, using around 100 runs to predict Llong and Lbase with a confidence of 99%. The metamodel was trained within the design parameter ranges shown in Table 4, augmented with physical constraints such as \(x_1 > x_0\), \(x_4<x_0\), and a realizable number of turns x3 within the area defined by x0, x4, x5.
Table 4
Parameter ranges for CI surrogate training.
x0
x1
x2
x3
x4
x5
[5, 149] mm
[6, 150] mm
[5, 30] mm
[2, 25]
[1, 10] mm
\([90, 179]\)°
To incorporate the CI surrogate model into the system-level optimization framework, it was exported as FMU, similar to the earlier circuit surrogate. Input and output parameters are summarized in Fig. 6. The FMU takes the CI design parameters as input and provides corresponding output estimates, including the volume (1), Lbase, Llong and Bcore according (5) for a reference winding current of 1 A. In a subsequent post-processing step, the magnetic flux density in the core is computed for the actual current \(I_\mathrm{T,pp}\) obtained from circuit simulation, see Fig. 5. If the resulting core flux density Bcore remains below the material’s saturation flux density Bsat = 1.2 T, the design is considered, but otherwise discarded.
Note that for \(k\approx 1\) (3) yields \(L_\mathrm{trans}\approx L_\mathrm{base}\). Hence, directly using the physical simulation output Lbase for circuit simulation it is sufficiently accurate.
3.3 Common mode choke (CMC)
The CMC modeling is very similar to the CI approach described above. LCMC and Bcore for geometry parameters of Table 5 are obtained from 2D magnetostatic simulation, see Fig. 3, whereas the simulated magnetic flux density Bcore is normalized with ICM = 1 A and scaled to the actual circuit current in post-processing, see Fig. 7. The averaged flux within the core surface was constrained in post-processing with Bsat = 1.2 T.
The winding coverage x5 was fixed to 100°, ensuring complete coverage of the core, because larger spacing provides better protection against electrical breakdown between windings.
4 Application
The flowchart of Fig. 8 describes how the trained surrogates were combined to obtain a working and EMI compliant selection of magnetic components.
Collecting the results produced during circuit surrogate training allows to produce the sensitivity matrix of Fig. 9. It shows that CMC and Cy to similar extent impact low-frequency emissions, while for high frequencies the CI longitudinal inductance Llong is dominant. This is because it resonates with the parasitic CM capacitances of the power module (highlighted in Fig. 1a), leading to a narrow emission peak above 10 MHz (see Fig. 14). The parallel coordinates plot Fig. 10 is a visual summary of all tested parameter combinations (light grey background, left) and resulting responses (dark grey background, right). Highlighted in red are three designs with lowest LCMC and Lbase which means smallest component sizes for CMC and CI. The selection suggests components with LCMC slightly above 3 mH and CI designs with LLong = 3–5 µH and Lbase = 2.5–3.2 mH.
Fig. 9
Circuit surrogate: Sensitivity matrix showing impact of input parameters (x-axis) on output quantities (y-axis). vio1 to vio4 are limit line violations with increasing frequency range, see Fig. 14
Parallel coordinates plot resulting from 401 circuit simulations, of which 138 parameter sets complied with EMI limits. Feasible results were limited to 24 sets with LCMC below 4 mH and IT smaller 2.3 A
In a second step an optimization with maximum 4000 evaluations of the CMC and CI surrogates were triggered—taking full advantaged of the pre-trained metamodels, thus requiring only some minutes to process—to search for designs with minimal volume fulfilling the constraints discussed above. The output was both times only a handful of feasible designs, illustrated in Fig. 11 and Fig. 12. In both cases the solution with smallest volume was selected manually.
Fig. 11
Feasible CI designs, which can carry 180 A line current. The highlighted selected design is the one with smallest volume while \(L_\text{base}\ge\)2.5 mH, \(L_\text{long}\ge\)3 µH and not saturating at IT of about 2 A
Feasible CMC designs, which can carry 180 A line current. The highlighted design is the one with smallest volume. LCMC = 3.14 mH and not saturating at ICM of about 270 mA (compare Fig. 10)
Finally, simulated currents and CM emission spectrum of the selected solution (with updated CMC subcircuits from 3D simulation), are shown in Fig. 13 and Fig. 14. The EMI spectrum shows that selected designs could be operated with CY as low as 200 nF. However, the maximum 330 nF were chosen to have some margin towards the EMI limits. Additionally, the green line shows the effect of considering the actual CMC winding capacitance by subsequent 3D simulation as discussed in Sect. 2.2.
Fig. 13
Device currents and CM EMI spectrum for selected CMC with 3.14 mH (Fig. 17) and CI with Ltrans = 2.46 mH, Llong = 5.1 µH (Fig. 16), CY = 330 nF, CX = 15 µF
As an initial reference and primarily to illustrate design improvements discussed in this article, Fig. 15 presents photographs of CI and CMC hardware prototypes that generally meet the power requirements of the application circuit but were not specifically optimized for the intended operating mode or the generic EMI constraints assumed in this work. Figures 16 and Abb. 17 offer 3D sketches of the selected designs compared to the hardware references.
Fig. 15
Photos of CI and CMC reference hardware, including Cx, Cy in blue. a CI hardware, b CMC hardware
CMC model used for electrostatic 3D simulation to extract inter-winding capacitance of candidate designs. Left: selected design resulting from presented workflow. Right: reference design of Fig. 15b. Parameters are compared in Table 7
Table 6 compares the CI designs of Fig. 16, representing trade-offs between current requirements, volume, and EMI compliance. EMC assumes LCMC = 3.8 mH for reference and 3.14 mH for the selected design. It shows that the reference combination of CI and CMC was not compliant, compare Fig. 14. Bcore at 1 A test current was calculated with (5). The maximum current before saturation \(I_\mathrm{T,max}\) is \(B_\text{sat}/B_\mathrm{core}\). The actual current \(I_\mathrm{T,pp}\) when used in the application circuit was delivered from circuit simulation, compare Fig. 13. It shows that the reference CI could not handle the required current. The volume was calculated by (1). The required RMS line current Iline is 180 A. Selected design is close to the limit, while the reference is oversized.
Table 6
Coupled inductor: Parameters of selected and reference design.
Selected
Reference
Design
Design
Llong
5.1 µH
13 µH
Lbase
2.46 mH
4.3 mH
EMC
{pass}
{fail}
Bcore/1 A
0.53 T
0.86 T
\(I_\mathrm{T,max}\)
2.53 A
1.39 A
\(I_\mathrm{T,pp}\)
{2.39 A}
{1.34 A}
x0
26.4 mm
27 mm
x1
35 mm
20 mm
x2
21.9 mm
25 mm
x3
13
20
x4
4.5 mm
9 mm
x5
171°
160°
Vcore
299 cm3
246 cm3
\(I_\mathrm{line,max}\)
{190 A}
{298 A}
In same manner Table 7 compares the CMC designs of Fig. 17.
Table 7
CMC: Parameters of selected and reference design. CY = 330 nF
Selected
Reference
Design
Design
LCMC
3.14 mH
3.8 mH
EMC
{pass}
{fail}
Bcore/1 A
1.5 T
1.2 T
\(I_\mathrm{CM,max}\)
800 A
1000 mA
\(I_\mathrm{CM,pp}\)
{267 mA}
{353 mA}
x0
21.4 mm
23 mm
x1
18.7 mm
19 mm
x2
16 mm
24.8 mm
x3
7
6
x4
5.7 mm
7.1 mm
x5
100°
90°
Vcore
105 cm3
188 cm3
\(I_\mathrm{line,max}\)
{196 A}
{159 A}
5 Conclusion
This study demonstrates the effectiveness of surrogate modeling in the design and optimization of magnetic components for high-power EV charging converters. By nesting system and component-level surrogates, presented workflow enables rapid exploration of feasible designs that meet both functional and EMC constraints. The surrogate models for the CI and CMC accurately predict key parameters such as inductance, core flux density, and volume, while the circuit surrogate delivers expected winding currents in application. The presented models account for current-induced core saturation effects and include constraints on copper current density to reflect differential-mode current limits. The study applied the concept of edge-wound flat wire windings without accounting for manufacturability. To improve physical realism, the latter could be incorporated and geometric parameter generation refined by enforcing stricter physical constraints, such as clearance, creepage, and other dimensional limits. Overall, the presented approach offers a scalable and efficient methodology for magnetic component design in complex power electronic systems.
Acknowledgements
This work has been jointly supported by AVL List GmbH, Graz, Austria, CBMM Technology Suisse SA, Geneve, Switzerland, VACUUMSCHMELZE GmbH & Co. KG, Hanau, Germany, and by Silicon Austria Labs (SAL), owned by the Republic of Austria, the Styrian Business Promotion Agency (SFG), the federal state of Carinthia, the Upper Austrian Research (UAR), and the Austrian Association for the Electric and Electronics Industry (FEEI).
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Herbert Hackl
received the B.Sc., M.Sc., and Ph.D. degrees in electrical engineering from the Graz University of Technology, Graz, Austria, in 2012, 2014 and 2019, respectively. From 2014 to 2018, he worked on the simulation of radiated emission of integrated circuits at NXP Semiconductors Austria in cooperation with the Institute of Electronics, Graz University of Technology. He is currently a Scientist with Silicon Austria Labs (SAL), Graz, Austria, where his field of research includes the simulation of electromagnetic compatibility and coexistence with focus on model-based design of electronic circuits and systems.
Christian Manfred Riener
received his B.S. and M.S. degrees in Electrical Engineering from Graz University of Technology in 2019. He began his professional career in the semiconductor industry as an analog chip designer, focusing on ultra-low power RF communication systems. In 2020, he returned to Graz University of Technology to pursue a Ph.D. in Electrical Engineering, focusing on the broadband modelling of passive components, electromagnetic compatibility modelling, and high-frequency measurement techniques. After completing his Ph.D. in 2024, he joined Silicon Austria Labs, where he is currently involved in designing and simulating magnetic components and EMC-aware designs for power electronics systems. His research interests include numerical simulation, optimization, surrogate modelling, and EMC simulation.
Mehtab Hussain
received his Bachelor’s degree from UET Lahore in 2017. He has worked on applied research in power electronics in collaboration with various industrial partners and is currently serving as a Research Engineer in Power Electronics at Silicon Austria Labs (SAL), Austria His research focuses on grid-connected converters, including filter design, simulation-based modeling, as well as the applied control solutions for different topologies.
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