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2020 | OriginalPaper | Buchkapitel

Synthesizing Environment Invariants for Modular Hardware Verification

verfasst von : Hongce Zhang, Weikun Yang, Grigory Fedyukovich, Aarti Gupta, Sharad Malik

Erschienen in: Verification, Model Checking, and Abstract Interpretation

Verlag: Springer International Publishing

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Abstract

We automate synthesis of environment invariants for modular hardware verification in processors and application-specific accelerators, where functional equivalence is proved between a high-level specification and a low-level implementation. Invariants are generated and iteratively strengthened by reachability queries in a counterexample-guided abstraction refinement (CEGAR) loop. Within each iteration, we use a syntax-guided synthesis (SyGuS) technique for generating invariants, where we use novel grammars to capture high-level design insights and provide guidance in the search over candidate invariants. Our grammars explicitly capture the separation between control-related and data-related state variables in hardware designs to improve scalability of the enumerative search. We have implemented our SyGuS-based technique on top of an existing Constrained Horn Clause (CHC) solver and have developed a framework for hardware functional equivalence checking that can leverage other available tools and techniques for invariant generation. Our experiments show that our proposed SyGuS-based technique complements or outperforms existing property-directed reachability (PDR) techniques for invariant generation on practical hardware designs, including an AES block encryption accelerator, a Gaussian-Blur image processing accelerator and the PicoRV32 processor.

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Fußnoten
1
Hereafter, we will use “equivalence checking” to refer to instruction-level functional equivalence checking.
 
2
Our tool implementation can utilize general constraints in an environment abstraction, not necessarily invariants; however, we focus on invariant generation in this paper – hence we will use abstractions/constraints/invariants interchangeably when discussing the environment hereafter.
 
3
All CHC rules are considered to be universally quantified over the variables.
 
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Metadaten
Titel
Synthesizing Environment Invariants for Modular Hardware Verification
verfasst von
Hongce Zhang
Weikun Yang
Grigory Fedyukovich
Aarti Gupta
Sharad Malik
Copyright-Jahr
2020
DOI
https://doi.org/10.1007/978-3-030-39322-9_10