5. System Design

This chapter provides high voltage generator system design. A gate level hard switching pump model is first presented for designing a single pump block. Multiple pumps are distributed in a die, each of which has wide power ground bus lines. Total area including the charge pump circuits and the power bus lines needs to be paid attention for overall area reduction. Design methodology is shown using an example. Another concern on multiple high voltage generator system design is system level simulation time. Even though the switching pump models are used for system verification, simulation run time is still slow especially for Flash memory where the minimum clock period is 20–50 ns whereas the maximum erase operation period is 1–2 ms. In order to drastically reduce the simulation time, another charge pump model together with a regulator model is described which makes all the nodes in the regulation feedback loop analog to eliminate the hard-switching operation.

Figure 5.1 illustrates on-chip high-voltage generator system and summarizes key discussion in each section. Section 5.1 reviews a hard-switching pump model for designing a single pump cell. The pump outputs the current with an enabling signal high and disconnects the output terminal with the signal low. Thus, two logic states in the signal make the pump hardly turn on or off. The pump model can be implemented in a system together with its pump regulator for system simulation. Section 5.2 expands the model to allow the power line resistance to be included as a design parameter rather than a given condition. Thus, one can determine the power line width as well as the pump parameters such as the number of stages and the pump capacitor to minimize the entire area for the pump and the power lines. Section 5.3 then discusses a behavior model supporting to connect the power ground terminal of each pump with its local power ground lines. In case where power ground lines are shared with other pumps and with high power circuit blocks, there can be interference between one pump and the other blocks. Because lower voltage LSIs have larger sensitivity of power ground noises on performance in terms of speed and variation, the pump behavior model provides high quality on system design. Section 5.4 presents a soft-switching pump model working together with a pump regulator model to avoid a hard-switching for faster system simulation. The soft-switching pump model includes I _DD calculation so that one can get the total I _DD waveform in entire simulation period. Section 5.5 presents system and circuit design and verification procedures using several models to meet the requirement for the system.