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2012 | OriginalPaper | Buchkapitel

5. System Exploration

verfasst von : Jari Kreku, Kari Tiensyrjä

Erschienen in: Scalable Multi-core Architectures

Verlag: Springer New York

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Abstract

Future embedded system products, e.g. smart handheld mobile terminals, will accommodate a large number of applications that will partly run sequentially and independently, partly concurrently and interacting on massively parallel computing platforms. Already for systems of moderate complexity, the design space will be huge and its exploration requires that the system architect is able to quickly evaluate the performances of candidate architectures and application mappings. The mainstream evaluation technique today is the system-level performance simulation of the applications and platforms using abstracted workload and processing capacity models, respectively. These virtual system models allow fast simulation of large systems at an early phase of development with reasonable modelling effort and time. The accuracy of the performance results is dependent on how closely the models used reflect the actual system. This chapter gives a description of the ABSOLUT modelling and simulation approach. Firstly, it gives an outline view of the approach and its evolution. Secondly, it describes how to create different models. Thirdly, it describes the means for simulation.

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Literatur
1.
Zurück zum Zitat L. Benini, A. Bogliolo, and G. DeMicheli. A survey of design techniques for system-level dynamic power management. IEEE TVSLI, 8(3):299–316, 2000. L. Benini, A. Bogliolo, and G. DeMicheli. A survey of design techniques for system-level dynamic power management. IEEE TVSLI, 8(3):299–316, 2000.
2.
Zurück zum Zitat L. Benini, R. Hodgson, and P. Siegel. System-level power estimation and optimization. In International Symposium on Low Power Electronics and Design, 1998. L. Benini, R. Hodgson, and P. Siegel. System-level power estimation and optimization. In International Symposium on Low Power Electronics and Design, 1998.
3.
Zurück zum Zitat M. Caldari, M. Conti, M. Coppola, P. Crippa, S. Orcioni, L. Pieralisi, and C. Turchetti. System-level power analysis methodology applied to the amba ahb bus. In The Design Automation and Test in Europe (DATE), 2003. M. Caldari, M. Conti, M. Coppola, P. Crippa, S. Orcioni, L. Pieralisi, and C. Turchetti. System-level power analysis methodology applied to the amba ahb bus. In The Design Automation and Test in Europe (DATE), 2003.
4.
Zurück zum Zitat E.A. de Kock, G. Essink, W.J.M. Smits, P. van der Wolf, J.-Y. Brunel, W.M. Kruijtzer, P. Lieverse, and K.A. Vissers. YAPI: Application modeling for signal processing systems. In 37th Design Automation Conference (DAC), pages 402–405, 2000. E.A. de Kock, G. Essink, W.J.M. Smits, P. van der Wolf, J.-Y. Brunel, W.M. Kruijtzer, P. Lieverse, and K.A. Vissers. YAPI: Application modeling for signal processing systems. In 37th Design Automation Conference (DAC), pages 402–405, 2000.
5.
Zurück zum Zitat N. Dhanwada, I.C. Lin, and V. Narayanan. A power estimation methodology for SystemC transaction level models. In ACM Proceedings of CODES+ISSS05, pages 142–147, September 2005. N. Dhanwada, I.C. Lin, and V. Narayanan. A power estimation methodology for SystemC transaction level models. In ACM Proceedings of CODES+ISSS05, pages 142–147, September 2005.
6.
Zurück zum Zitat K. Flautner, D. Flynn, D. Roberts, and D.I. Patel. IEM926: An energy efficient SoC with dynamic voltage scaling. In The Design Automation and Test in Europe (DATE), 2004. K. Flautner, D. Flynn, D. Roberts, and D.I. Patel. IEM926: An energy efficient SoC with dynamic voltage scaling. In The Design Automation and Test in Europe (DATE), 2004.
7.
Zurück zum Zitat D. Gajski, J. Zhu, R. Dörner, A. Gerstlauer, and S. Zhao. SpecC: Specification Language and Methodology. Kluwer Academic Publishers, 2000. 313 p. D. Gajski, J. Zhu, R. Dörner, A. Gerstlauer, and S. Zhao. SpecC: Specification Language and Methodology. Kluwer Academic Publishers, 2000. 313 p.
8.
Zurück zum Zitat F. Ghenassia, editor. Transaction-Level Modeling with SystemC: TLM Concepts and Applications for Embedded Systems. Springer, 2005. 271 p. F. Ghenassia, editor. Transaction-Level Modeling with SystemC: TLM Concepts and Applications for Embedded Systems. Springer, 2005. 271 p.
9.
Zurück zum Zitat M. Gries. Methods for evaluating and covering the design space during early design development. Integration, the VLSI Journal, 38(2):131–183, 2004.CrossRef M. Gries. Methods for evaluating and covering the design space during early design development. Integration, the VLSI Journal, 38(2):131–183, 2004.CrossRef
10.
Zurück zum Zitat S. Idgunji. Case study of a low power MTCMOS based ARM926 SoC: Design, analysis and test challenges. In IEEE International Test Conference (ITC), pages 1–10, October 2007. S. Idgunji. Case study of a low power MTCMOS based ARM926 SoC: Design, analysis and test challenges. In IEEE International Test Conference (ITC), pages 1–10, October 2007.
11.
Zurück zum Zitat R. Jain. The Art of Computer Systems Performance Analysis: Techniques for Experimental Design, Measurement, Simulation and Modeling. John Wiley & Sons, Inc., 1991. 685 p. R. Jain. The Art of Computer Systems Performance Analysis: Techniques for Experimental Design, Measurement, Simulation and Modeling. John Wiley & Sons, Inc., 1991. 685 p.
12.
Zurück zum Zitat T. Kangas, P. Kukkala, H. Orsila, E. Salminen, M. Hännikäinen, T.D. Hämäläinen, J. Riihimäki, and K. Kuusilinna. UML-based multi-processor SoC design framework. Transactions on Embedded Computing Systems, 5(2):281–320, 2006.CrossRef T. Kangas, P. Kukkala, H. Orsila, E. Salminen, M. Hännikäinen, T.D. Hämäläinen, J. Riihimäki, and K. Kuusilinna. UML-based multi-processor SoC design framework. Transactions on Embedded Computing Systems, 5(2):281–320, 2006.CrossRef
13.
Zurück zum Zitat J. Kreku, M. Eteläperä, and J-P. Soininen. Exploitation of UML 2.0-based platform service model and SystemC workload simulation in MPEG-4 partitioning. In International Symposium on System-on-Chip Proceedings, pages 167–170, 2005. J. Kreku, M. Eteläperä, and J-P. Soininen. Exploitation of UML 2.0-based platform service model and SystemC workload simulation in MPEG-4 partitioning. In International Symposium on System-on-Chip Proceedings, pages 167–170, 2005.
14.
Zurück zum Zitat J. Kreku, M. Hoppari, T. Kestilä, Y. Qu, J.-P. Soininen, and K. Tiensyrjä. Languages for Embedded Systems and their Applications, volume 36 of Lecture Notes in Electrical Engineering, chapter Application Workload and SystemC Platform Modeling for Performance Evaluation, pages 131–148. Springer, 2009. J. Kreku, M. Hoppari, T. Kestilä, Y. Qu, J.-P. Soininen, and K. Tiensyrjä. Languages for Embedded Systems and their Applications, volume 36 of Lecture Notes in Electrical Engineering, chapter Application Workload and SystemC Platform Modeling for Performance Evaluation, pages 131–148. Springer, 2009.
15.
Zurück zum Zitat J. Kreku, M. Hoppari, T. Kestilä, Yang Qu, J.-P. Soininen, P. Andersson, and K. Tiensyrjä. Combining uml2 application and systemc platform modelling for performance evaluation of real-time embedded systems. EURASIP Journal on Embedded Systems, 2008. J. Kreku, M. Hoppari, T. Kestilä, Yang Qu, J.-P. Soininen, P. Andersson, and K. Tiensyrjä. Combining uml2 application and systemc platform modelling for performance evaluation of real-time embedded systems. EURASIP Journal on Embedded Systems, 2008.
16.
Zurück zum Zitat J. Kreku, M. Hoppari, K. Tiensyrjä, and P. Andersson. Systemc workload model generation from uml for performance simulation. In Forum on Specification and Design Languages, 2007. J. Kreku, M. Hoppari, K. Tiensyrjä, and P. Andersson. Systemc workload model generation from uml for performance simulation. In Forum on Specification and Design Languages, 2007.
17.
Zurück zum Zitat J. Kreku, T. Kauppi, and J-P. Soininen. Evaluation of platform architecture performance using abstract instruction-level workload models. In International Symposium on System-on-Chip Proceedings, pages 43–48, 2004. J. Kreku, T. Kauppi, and J-P. Soininen. Evaluation of platform architecture performance using abstract instruction-level workload models. In International Symposium on System-on-Chip Proceedings, pages 43–48, 2004.
18.
Zurück zum Zitat J. Kreku, J. Penttilä, J. Kangas, and J-P. Soininen. Workload simulation method for evaluation of application feasibility in a mobile multiprocessor platform. In Proceedings of the Euromicro Symposium on Digital System Design, pages 532–539, 2004. J. Kreku, J. Penttilä, J. Kangas, and J-P. Soininen. Workload simulation method for evaluation of application feasibility in a mobile multiprocessor platform. In Proceedings of the Euromicro Symposium on Digital System Design, pages 532–539, 2004.
19.
Zurück zum Zitat J. Kreku, Y. Qu, J.-P. Soininen, and K. Tiensyrjä. Layered uml workload and systemc platform models for performance simulation. In International Forum on Specification and Design Languages (FDL), pages 223–228, 2006. J. Kreku, Y. Qu, J.-P. Soininen, and K. Tiensyrjä. Layered uml workload and systemc platform models for performance simulation. In International Forum on Specification and Design Languages (FDL), pages 223–228, 2006.
20.
Zurück zum Zitat J. Kreku, K. Tiensyrjä, and G. Vanmeerbeeck. Automatic workload generation for system-level exploration based on modified gcc compiler. In Design, Automation and Test in Europe conference and exhibition, March 2010. J. Kreku, K. Tiensyrjä, and G. Vanmeerbeeck. Automatic workload generation for system-level exploration based on modified gcc compiler. In Design, Automation and Test in Europe conference and exhibition, March 2010.
21.
Zurück zum Zitat K. Lahiri and A. Raghunathan. Power analysis of system-level on-chip communication architectures. In ACM Proceedings of CODES+ISSS04, pages 236–241, September 2004. K. Lahiri and A. Raghunathan. Power analysis of system-level on-chip communication architectures. In ACM Proceedings of CODES+ISSS04, pages 236–241, September 2004.
22.
Zurück zum Zitat P. Lieverse, P. van der Wolf, K. Vissers, and E. Deprettere. A methodology for architecture exploration of heterogeneous signal processing systems. Kluwer Journal of VLSI Signal Processing, 29(3):197–207, 2001.MATHCrossRef P. Lieverse, P. van der Wolf, K. Vissers, and E. Deprettere. A methodology for architecture exploration of heterogeneous signal processing systems. Kluwer Journal of VLSI Signal Processing, 29(3):197–207, 2001.MATHCrossRef
23.
Zurück zum Zitat P. Liu, B. Xia, C. Xiang, X. Wang, W. Wang, and Q. Yao. A networks-on-chip architecture design space exploration – the LIB. Computers and Electrical Engineering, (35):817–836, 2009. P. Liu, B. Xia, C. Xiang, X. Wang, W. Wang, and Q. Yao. A networks-on-chip architecture design space exploration – the LIB. Computers and Electrical Engineering, (35):817–836, 2009.
26.
Zurück zum Zitat J.-Y. Mignolet, R. Baert, T.J. Ashby, P. Avasare, Hye-On Jang, and Jae Cheol Son. Mpa: Parallelizing an application onto a multicore platform made easy. IEEE Micro, 29(3):31–39, May–June 2009. J.-Y. Mignolet, R. Baert, T.J. Ashby, P. Avasare, Hye-On Jang, and Jae Cheol Son. Mpa: Parallelizing an application onto a multicore platform made easy. IEEE Micro, 29(3):31–39, May–June 2009.
27.
Zurück zum Zitat J. M. Paul, D. E. Thomas, and A. S. Cassidy. High-level modeling and simulation of single-chip programmable heterogeneous multiprocessors. ACM Transactions on Design Automation of Electronic Systems, 10(3):431–461, July 2005.CrossRef J. M. Paul, D. E. Thomas, and A. S. Cassidy. High-level modeling and simulation of single-chip programmable heterogeneous multiprocessors. ACM Transactions on Design Automation of Electronic Systems, 10(3):431–461, July 2005.CrossRef
28.
Zurück zum Zitat A. Pimentel, C. Erbas, and S. Polstra. A systematic approach to exploring embedded system architectures at multiple abstraction levels. IEEE Transactions on Computers, 55(2):99–112, 2006.CrossRef A. Pimentel, C. Erbas, and S. Polstra. A systematic approach to exploring embedded system architectures at multiple abstraction levels. IEEE Transactions on Computers, 55(2):99–112, 2006.CrossRef
29.
Zurück zum Zitat H. Posadas, F. Herrera, P. Sánchez, E. Villar, and F. Blasco. System-level performance analysis in SystemC. In Proceedings of the Design Automation and Test in Europe Conference, Paris, France, February 2004. H. Posadas, F. Herrera, P. Sánchez, E. Villar, and F. Blasco. System-level performance analysis in SystemC. In Proceedings of the Design Automation and Test in Europe Conference, Paris, France, February 2004.
30.
Zurück zum Zitat S. Thoziyoor, N. Muralimanohar, and N.P. Jouppi. CACTI 5.0. HP Laboratories, 2007. Technical report HPL-2007-167. S. Thoziyoor, N. Muralimanohar, and N.P. Jouppi. CACTI 5.0. HP Laboratories, 2007. Technical report HPL-2007-167.
31.
Zurück zum Zitat T. Wild, A. Herkersdorf, and G.-Y. Lee. TAPES — trace-based architecture performance evaluation with SystemC. Design Automation for Embedded Systems, 10(2–3):157–179, 2006. Special Issue on SystemC-based System Modeling, Verification and Synthesis. T. Wild, A. Herkersdorf, and G.-Y. Lee. TAPES — trace-based architecture performance evaluation with SystemC. Design Automation for Embedded Systems, 10(2–3):157–179, 2006. Special Issue on SystemC-based System Modeling, Verification and Synthesis.
Metadaten
Titel
System Exploration
verfasst von
Jari Kreku
Kari Tiensyrjä
Copyright-Jahr
2012
Verlag
Springer New York
DOI
https://doi.org/10.1007/978-1-4419-6778-7_5

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