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1999 | Buch

Embedded System Architectures Kapitel lesen Erstes Kapitel lesen

System-Level Synthesis

herausgegeben von: Ahmed A. Jerraya, Jean Mermet

Verlag: Springer Netherlands

Buchreihe : NATO ASI Series

Enthalten in: Professional Book Archive

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Über dieses Buch

System-Level Synthesis deals with the concurrent design of electronic applications, including both hardware and software. The issue has become the bottleneck in the design of electronic systems, including both hardware and software, in several major industrial fields, including telecommunications, automotive and aerospace engineering. The major difficulty with the subject is that it demands contributions from several research fields, including system specification, system architecture, hardware design, and software design. Most existing book cover well only a few aspects of system-level synthesis. The present volume presents a comprehensive discussion of all the aspects of system-level synthesis. Each topic is covered by a contribution written by an international authority on the subject.

Inhaltsverzeichnis

Frontmatter

Models for System-Level Synthesis

1. Embedded System Architectures
Abstract
This chapter surveys the target architectures which are typically found in embedded systems and explains their impact on the system design process. Embedded systems have a high impact on the overall industry defining the features of telecommunication equipment, consumer products, or cars, to name just a few industrial sectors where these systems are ubiquitous. There is a large variety of embedded systems architectures which significantly differ from general purpose computer architectures. Despite their importance, these architectures are typically neglected in university curricula.
Rolf Ernst
2. Models of Computation for Embedded System Design
Abstract
In the near future, most objects of common use will contain electronics to augment their functionality, performance, and safety. Hence, time-to-market, safety, low-cost, and reliability will have to be addressed by any system design methodology. A fundamental aspect of system design is the specification process. We advocate using an unambiguous formalism to represent design specifications and design choices. This facilitates tremendously efficiency of specification, formal verification, and correct design refinement, optimization, and implementation. This formalism is often called model of computation. There are several models of computation that have been used, but there is a lack of consensus among researchers and practitioners on the “right” models to use. To the best of our knowledge, there has also been little effort in trying to compare rigorously these models of computation. In this paper, we review current models of computation and compare them within a framework that has been recently proposed. This analysis demonstrates both the need for heterogeneity to capture the richness of the application domains, and the need for unification for optimization and verification purposes. We describe in detail our CFSM model of computation, illustrating its suitability for design of reactive embedded systems and we conclude with some general considerations about the use of models of computations in future design systems.
Luciano Lavagno, Alberto Sangiovanni-Vincentelli, Ellen Sentovich
3. Multilanguage Specification for System Design
Abstract
This chapter discusses specification languages and intermediate models used for system-level design. Languages are used during one of the most important steps of system design: the specification of the system to be designed. A plethora of specification languages exists. Each claims superiority but excels only within a restricted application domain. Selecting a language is generally a trade off between several criteria such as the expressive power of the language, the automation capabilities provided by the model underlying the language and the availability of tools and methods supporting the language. Additionally, for some applications, several languages need to be used for the specification of different modules of the same design. Multilanguage solutions are required for the design of heterogeneous systems where different parts belong to different application classes e.g. control/data or continuous/discrete.
A. A. Jerraya, M. Romdhani, Ph. Le Marrec, F. Hessel, P. Coste, C. Valderrama, G. F. Marchioro, J. M. Daveau, N.-E. Zergainoh
4. High-Level Specification Languages for Embedded System Design
Abstract
In this chapter we show how to use three complementary languages, SDL, Statecharts and the language of MATRIX X, for the modelling and design of embedded systems. We base our approach on the fact that there is no perfect language for the design of embedded systems, and that one therefore has to find ways in which several formalisms, each with its own strength, can be used in conjunction. We present three ways of achieving this.
Carlos Delgado Kloos, Simon Pickin, Luis Sanchez, Angel Groba
5. Towards a New System Level Design Language -- SLDL
Abstract
It seems that system level design is on everyone’s mind these days. So, it is not surprising that talk of a system level design language has been appreaing in the news. Yet, major fundamental questions quickly arise whenever a “standard” design language is proposed. What is it? Why do we need it? What will it do? How is it different from other existing languages? How will it change my design methodology and design tool environment?
Steven E. Schulz

Techniques for System-Level Synthesis

6. Hardware/Software Co-Synthesis Algorithms
Abstract
This chapter surveys methodologies and algorithms for hardware-software co-synthesis. While much remains to be learned about co-synthesis, reserchers in the field have made a great deal of progress in a short period of time. Although it is still premature to declare an authoritative taxonomy of co-synthesis models and methods, we can now see commonalities and contrasts in formal models and algorithms.
Wayne Wolf
7. Rapid Prototyping, Emulation and Hardware-Software Co-Debugging
Abstract
ASICs will continue to grow increasingly complex. Errors of specification, design and implementation are unavoidable. Consequently, designers need validation methods and tools to ensure a perfect design before the production is started. Errors caught after fabrication incur not only added production costs, but also delay the product, which is an increasingly serious detriment in today’s fast-paced international markets. “First-time-right silicon” is, therefore, one of the most important goals of chip-design projects.
Wolfgang Rosenstiel
8. Dynamic Power Management of Electronic Systems
Abstract
Dynamic power management is a design methodology aiming at controlling performance and power levels of digital circuits and systems, with the goal of extending the autonomous operation time of battery-powered systems, providing graceful performance degradation when supply energy is limited, and adapting power dissipation to satisfy environmental constraints.
We survey dynamic power management applied at the system level. We analyze first idleness detection and shutdown mechanisms for idle hardware resources. We review industrial standards for operating system-based power management, such as the Advanced Configuration and Power Interface (ACPI) standard proposed by Intel, Microsoft and Toshiba. Next, we review system-level modeling techniques, and describe stochastic models for the power/performance behavior of systems. We analyze different modeling assumptions and we discuss their validity. Last, we describe a method for determining optimum policies and validation methods, via simulation at different abstraction levels, for power managed systems.
Giovanni De Micheli, Luca Benini, Alessandro Bogliolo
9. Compiler Generation Techniques for Embedded Processors and their Application to HW/SW Codesign
Abstract
Due to the advancing semiconductor technology it is becoming possible within ten years to fabricate a highly complex and high performance VLSI that includes more than hundred million transistors on a single silicon chip [1]. Using such a technology, so-called systems-on-a-chip, that includes CPU cores, DSPs, memory blocks (RAM and ROM), application specific hardware modules, FPGA blocks, as well as analog and radio frequency blocks, as shown Figure 1. Systems-on-a-chip will be suitable for embedded applications, such as consumer electronics products that perform sophisticated data and information processing, telecommunication equipment that perform movie picture and audio transmission, control systems for industrial manufacturing, automobile, and avionics.
Masaharu Imai, Yoshinori Takeuchi, Norimasa Ohtsuki, Nobuyuki Hikichi

Methodologies and Tools for System-Level Synthesis

10. IP-Centric Methodology and Design with the SpecC Language
System Level Design of Embedded Systems
Abstract
In this paper, we demonstrate the application of the specify-explore-refine (SER) paradigm for an IP-centric codesign of embedded systems. We describe the necessary design tasks required to map an abstract executable specification of the system to the architectural implementation model. We also describe the final and intermediate models generated as a result of these design tasks. The executable specification and its refinements should support easy insertion and reuse of IPs.
Although several languages are currently used for system design, none of them completely meets the unique requirements of system modelling with support for IP reuse. This paper discusses the requirements and objectives for system languages and describes a C-based language called SpecC, which precisely covers these requirements in an orthogonal manner.
Finally, we describe the design environment which is based on our code-sign methodology.
Daniel D. Gajski, Rainer Dömer, Jianwen Zhu
11. The Javatime Approach to Mixed Hardware-Software System Design
Abstract
We describe an approach for using Java as a basis for a design and specification language for embedded systems and use our JavaTime system to illustrate many aspects of the approach. Java is a pragmatic choice for several reasons. Since it is a member of the C “family” of languages, it is familiar to designers. Unlike C and C++, it has standard support for concurrency. Its treatment of arrays permits better static and dynamic error checking than is conveniently feasible in C and C++. Finally, while Java’s expressive power is comparable to C++, it is a much simpler language, that greatly eases the task of introducing additional analysis into compilers.
Successive, formal refinement is an approach we have developed for specification of embedded systems using a general-purpose programming language. Systems are formally modeled as Abstractable Reactive systems, and Java is used as the design input language. A policy-of-use is applied to Java, in the form of language usage restrictions and class-library extensions, to ensure consistency with the formal model. A process of incremental, user-guided program transformation is used to refine a Java program until it is consistent with the policy-of-use. This approach allows systems design to begin with the flexibility of a general-purpose language, followed by gradual refinement into a more restricted form necessary for specification.
James Shin Young, Josh MacDonald, Michael Shilman, Abdallah Tabbara, Paul Hilfinger, A. Richard Newton
12. Models and Methods for HW/SW Intellectual Property Interfacing
Abstract
This paper focuses on the problem of enabling system companies to quickly integrate IPs from different sources, and adapt them to different manufacturing technologies. An evolutionary approach from current methodologies is possible with appropriate and extensive CAD support. We cover the main aspects of interfacing Intellectual Property, both in hardware and software form, in an embedded system design context. In particular, we review the main approaches to specification, synthesis and validation of interfaces that have appeared in the literature. From the specification viewpoint, we illustrate the main protocol and timing constraint specification models. From the synthesis and optimization viewpoint, we review software and hardware generation, as well as time-driven interface scheduling techniques. From the verification viewpoint, we discuss various strategies for hardware/software co-simulation, with special attention to the interface layer. Finally, we consider the growing importance of formal verification in this domain, and outline the main techniques for interface protocol verification.
Ross B. Ortega, Luciano Lavagno, Gaetano Borriello
Backmatter
Metadaten
Titel
System-Level Synthesis
herausgegeben von
Ahmed A. Jerraya
Jean Mermet
Copyright-Jahr
1999
Verlag
Springer Netherlands
Electronic ISBN
978-94-011-4698-2
Print ISBN
978-0-7923-5749-0
DOI
https://doi.org/10.1007/978-94-011-4698-2