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Erschienen in:
2006 | OriginalPaper | Buchkapitel
Taking Advantage of the SHECS-Based Critical Sections in the Shared Memory Parallel Architectures
verfasst von : Tomasz Madajczak
Erschienen in: Parallel Processing and Applied Mathematics
Verlag: Springer Berlin Heidelberg
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This document presents a new method for implementing critical sections in the shared memory parallel architectures such as multithreaded multiprocessors integrated on a die. The method bases on Shared Explicit Cache System (SHECS) implemented in the multiprocessor. The document presents the concept of system architecture equipped with SHECS, the algorithm to implement operating system or application level locking service, and the results obtained with the method simulation on the network processor Intel IXP2800.