2001 | OriginalPaper | Buchkapitel
TCAD Analysis of Gain Cell Retention Time for SRAM Applications
verfasst von : A. Gehring, C. Heitzinger, T. Grasser, S. Selberherr
Erschienen in: Simulation of Semiconductor Processes and Devices 2001
Verlag: Springer Vienna
Enthalten in: Professional Book Archive
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We present simulations of a recently published SRAM memory gain cell consisting of two transistors and one MOS capacitor, representing an alternative to conventional six transistor SRAMs. Inverse modeling is used to fit a given device characteristic to measurement data. To account for de-charging due to tunneling, we use a simple, non-local tunneling model and calibrate it with data from literature. By optimization, we find values for the contact voltages in the off-region at which the retention time is a maximum.