2011 | OriginalPaper | Buchkapitel
Temporal Partitioning Algorithm for Dynamically Reconfigurable Computing Systems
verfasst von : Ramzi Ayadi, Bouaoui Ouni, Abdellatif Mtibaa
Erschienen in: Informatics Engineering and Information Science
Verlag: Springer Berlin Heidelberg
Aktivieren Sie unsere intelligente Suche, um passende Fachinhalte oder Patente zu finden.
Wählen Sie Textabschnitte aus um mit Künstlicher Intelligenz passenden Patente zu finden. powered by
Markieren Sie Textabschnitte, um KI-gestützt weitere passende Inhalte zu finden. powered by
In reconfigurable computing systems, dynamically reconfigurable FPGA are evolving rapidly, due to their flexibility and high performance. The communication cost is one of important factors in dynamically reconfigurable FPGA. This paper proposes a new temporal partitioning algorithm for the dynamically reconfigurable FPGA to reduce communication cost between partitions. To experimentally verify the proposed temporal partitioning algorithm, we apply two benchmarks. They include discrete cosine transform (DCT) 4×4 and DCT 16×16.