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Erschienen in:
1990 | OriginalPaper | Buchkapitel
Test Invalidation
verfasst von : Niraj K. Jha, Sandip Kundu
Erschienen in: Testing and Reliable Design of CMOS Circuits
Verlag: Springer US
Enthalten in: Professional Book Archive
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CMOS has become a very popular technology because of its low-power requirement and high density. However, an increase in the density of the chips also increases the complexity of testing. To further add to the woes of a testing engineer, new mechanisms have been identified through which a test derived for a CMOS circuit may be invalidated. In other words, a test may not be able to do its intended job. This is the topic of discussion in this chapter.