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Über dieses Buch

In February of 1990, the balloting process for the IEEE proposed standard P1149.1 was completed creating IEEE Std 1149.1-1990. Later that summer, in record time, the standard won ratification as an ANSI standard as well. This completed over six years of intensive cooperative effort by a diverse group of people who share a vision on solving some of the severe testing problems that exist now and are steadily getting worse. Early in this process, someone asked me if 1 thought that the P1l49.l effort would ever bear fruit. 1 responded somewhat glibly that "it was anyone's guess". Well, it wasn't anyone's guess, but rather the faith of a few individuals in the proposition that many testing problems could be solved if a multifaceted industry could agree on a standard for all to follow. Four of these individuals stand out; they are Harry Bleeker, Colin Maunder, Rodham Tulloss, and Lee Whetsel. In that I am convinced that the 1149.1 standard is the most significant testing development in the last 20 years, I personally feel a debt of gratitude to them and all the people who labored on the various Working Groups in its creation.

Inhaltsverzeichnis

Frontmatter

Chapter 1. Boundary-Scan Basics and Vocabulary

Abstract
Boundary-Scan, formally known as IEEE/ANSI Standard 1149.1-2001 [IEEE01, Maun90], is a collection of design rules applied principally at the Integrated Circuit (IC) level that allow software to alleviate the growing cost of designing, producing and testing digital systems. A fundamental benefit of the standard is its ability to transform extremely difficult printed circuit board testing problems that could only be attacked with Ad-Hoc testing methods [Will83] into well-structured problems that software can easily and swiftly deal with.
Kenneth P. Parker

Chapter 2. Boundary-Scan Description Language (BSDL)

Abstract
The chapter of IEEE/ANSI Standard 1149.1 titled “Conformance and Documentation Requirements,” [IEEE01] gives a list of items a designer of an 1149.1 component must document. This information must be provided to users of the component so they may effectively use the Boundary-Scan features. While this list is necessary, it is not sufficient in the practical sense that in nearly all cases software will be utilizing this data. Software cannot read specification documents generated by randomly chosen designers, each with a unique interpretation of the documentation requirements, each with a unique style. On top of this, the propensity of humans to overlook an item or two, or to make mistakes, is high.
Kenneth P. Parker

Chapter 3. Boundary-Scan Testing

Abstract
Boundary-Scan testing is aimed primarily at digital logic structures, although Boundary-Scan assets can provide invaluable resources for assisting with mixed digital/analog testing as well. This chapter covers various test approaches utilizing 1149.1.
Kenneth P. Parker

Chapter 4. Advanced Boundary-Scan Topics

Abstract
As this book goes to press, the 1149.1 Standard is in its thirteenth year of existence. Chapter 3 discussed the most basic and general uses of the Standard. This chapter will examine some other uses that have been proposed or have been implemented in some quarters.
Kenneth P. Parker

Chapter 5. Design for Boundary-Scan Test

Abstract
Design for Testability (DFT) is a subject covering a huge amount material. The 1983 survey by Williams and Parker [Will83] is still remarkably current in its enumeration of DFT techniques (it lacks Boundary-Scan of course), but many of the contexts have changed. For example, signature analysis [Nadi77] testing is now conducted on-chip, though it started as a board-level technique. This reflects the incredible increase in the density of Integrated Circuit (IC) components. In 1983, the 1149.1 Standard would have been largely impractical because the logic needed to implement it would have been a large fraction of an IC. Today, we are seeing ICs designed with significant amounts of on-chip testing circuitry, including 1149.1. Without DFT, a VLSI component might not be economical to produce in volume.
Kenneth P. Parker

Chapter 6. Analog Measurement Basics

Abstract
The preceding chapters of this book have confined the discussion to digital circuits and test subjects. Most electronic engineers are experts in digital technology but many will admit that their familiarity falls off quickly when the discussion turns to analog topics, particularly analog testing. Before getting into IEEE 1149.4 Analog Boundary-Scan, it will be important to lay a foundation for basic analog measurements used today in In-Circuit testers. While 1149.4 does have significant differences over classical In-Circuit test, there are a lot of similarities. Knowing where we came from will also help motivate where we are now going.
Kenneth P. Parker

Chapter 7. IEEE 1149.4: Analog Boundary-Scan

Abstract
IEEE Standard 1149.4 [IEEE99] is titled “Mixed Signal Test Bus” but has become known popularly as “Analog Boundary-Scan”. It is natural to ask, what is “Analog Boundary-Scan”? The digital paradigm we have been using is confusing when we hear the word analog. Could it mean we somehow capture analog voltages and somehow shift them out for viewing (as proposed in [Wagn88])? The answer is “no”. The simplest concept of the 1149.4 Standard is to imagine that we have integrated a portion of an ATE system’s analog measurement bus and multiplexing system into an IC, eliminating the need for bed-of-nails access to it. Since these test resources have been converted from discrete relays, wire wrap and nails into silicon, they will scale with silicon technology as it continues to shrink.
Kenneth P. Parker

Chapter 8. IEEE 1149.6: Testing Advanced I/O

Abstract
IEEE Standard 1149.6 [IEEE03] addresses “Boundary-Scan Testing of Advanced Digital Networks” but has become known popularly as “The AC EXTEST” standard. This popular title is really a misnomer. The formal title speaks of testing of advanced digital networks, meaning the I/O structures between ICs. During the development of IEEE Standard 1149.1 over a decade ago, communication between ICs was conducted over single wires. Now we see a growing trend for differential transmission of signals, using two wires per signal channel, and we also are beginning to see AC coupling structures between ICs. AC-coupled differential channels are a signaling process that effectively defeats the testing capabilities of IEEE 1149.1.
Kenneth P. Parker

Chapter 9. IEEE 1532: In-System Configuration

Abstract
IEEE Standard 1532 [IEEE02] configuration” (ISC) means the devices can be loaded with programming data after they have been mounted on a board. Indeed, even non-volatile devices most likely are blank at the time of board placement, since this can eliminate potentially damaging handling steps for programming, and pre-placement inventory.
Kenneth P. Parker

Backmatter

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