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76315 Suchergebnisse für:

Hardware + Control Units 

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  1. 2024 | OriginalPaper | Buchkapitel

    Research on the Key Technologies of Control and Protection for Static Frequency Converter (SFC) Valve Group of Pumped Storage Units

    Pumped storage power station has the functions of peak loading, valley filling, frequency modulation and emergency backup, etc. When the pumped storage power station is running under the working condition of the motor, the static frequency …

    verfasst von:
    Xu Hao, Zhang Xuejun, Ma Jiayuan, Tian Anmin, Liang Shuaiqi, Wang Jiayu
    Erschienen in:
    The Proceedings of 2023 International Conference on Wireless Power Transfer (ICWPT2023) (2024)
  2. 2024 | OriginalPaper | Buchkapitel

    Heterogeneous Hardware

    This chapter provides the necessary background on computer architecture in order to understand how hardware accelerators are programmed and execute code. While this book focuses on high-level programming languages and managed runtime systems …

    verfasst von:
    Juan Fumero, Athanasios Stratikopoulos, Christos Kotselidis
    Erschienen in:
    Programming Heterogeneous Hardware via Managed Runtime Systems (2024)
  3. 24.10.2023 | OriginalPaper

    About Control Systems of Gas-Oil Power Units

    Maintaining the efficiency of thermal and mechanical equipment of generating facilities operating in the mode of system-wide parameter stabilization requires periodic updating/improvement (upgrade) of physical elements and algorithms of subsystems …

  4. 17.04.2024 | Online First

    FPGA-based hardware accelerator for SIC in uplink NOMA networks

    Non-Orthogonal Multiple Access (NOMA) is an emerging multiple access scheme for the fifth-generation (5G) and beyond 5G mobile communications. Since NOMA supports a massive number of users simultaneously in a single time/frequency resource block …

  5. 2024 | OriginalPaper | Buchkapitel

    A Performance Modelling-Driven Approach to Hardware Resource Scaling

    The continuous demand for higher computational performance and the stagnating developments in the general purpose processor landscape have led to a surge in interest for highly specialized and efficient hardware. Combined with the rising …

    verfasst von:
    Alexandre Rodrigues, Leonel Sousa, Aleksandar Ilic
    Erschienen in:
    Euro-Par 2023: Parallel Processing Workshops (2024)
  6. 2024 | OriginalPaper | Buchkapitel

    Hardware and Environment Modeling

    This chapter explores the role of RISC-V in the Internet of Things (IoT) era, emphasizing its popularity due to its open and free instruction set architecture. The chapter introduces virtual prototypes (VPs) as a crucial tool, addressing the gap …

    verfasst von:
    Pascal Pieper, Rolf Drechsler
    Erschienen in:
    Formal and Practical Techniques for the Complex System Design Process using Virtual Prototypes (2024)
  7. 2024 | OriginalPaper | Buchkapitel

    Hardware-In-Loop Test for Electronic Control Unit

    The vehicle's electronic control unit (ECU) to be validated and verified in accordance with client specifications. Adequate prototyping and testing are essential, in order to speed up assembly cycle time, automation in testing replaces manual …

    verfasst von:
    Bhupendra Teriya, Sushma Gupta
    Erschienen in:
    Recent Advances in Power Electronics and Drives (2024)
  8. Open Access 2024 | OriginalPaper | Buchkapitel

    Btor2-Cert: A Certifying Hardware-Verification Framework Using Software Analyzers

    Formal verification is essential but challenging: Even the best verifiers may produce wrong verification verdicts. Certifying verifiers enhance the confidence in verification results by generating a witness for other tools to validate the verdict …

    verfasst von:
    Zsófia Ádám, Dirk Beyer, Po-Chun Chien, Nian-Ze Lee, Nils Sirrenberg
    Erschienen in:
    Tools and Algorithms for the Construction and Analysis of Systems (2024)
  9. 2024 | OriginalPaper | Buchkapitel

    EFFLUX-F2: A High Performance Hardware Security Evaluation Board

    Side-channel analysis has become a cornerstone of modern hardware security evaluation for cryptographic accelerators. Recently, these techniques are also being applied in fields such as AI and Machine Learning to investigate possible threats.

    verfasst von:
    Arpan Jati, Naina Gupta, Anupam Chattopadhyay, Somitra Kumar Sanadhya
    Erschienen in:
    Constructive Side-Channel Analysis and Secure Design (2024)
  10. 2024 | OriginalPaper | Buchkapitel

    HaMAYO: A Fault-Tolerant Reconfigurable Hardware Implementation of the MAYO Signature Scheme

    MAYO is a topical modification of the established multivariate signature scheme UOV. Signer and Verifier locally enlarge the public key map, such that the dimension of the oil space and therefore, the parameter sizes in general, can be reduced.

    verfasst von:
    Oussama Sayari, Soundes Marzougui, Thomas Aulbach, Juliane Krämer, Jean-Pierre Seifert
    Erschienen in:
    Constructive Side-Channel Analysis and Secure Design (2024)
  11. 2024 | OriginalPaper | Buchkapitel

    Reconfigurable Edge Hardware for Intelligent IDS: Systematic Approach

    Intrusion detection systems (IDS) are crucial security measures nowadays to enforce network security. Their task is to detect anomalies in network communication and identify, if not thwart, possibly malicious behavior. Recently, machine learning …

    verfasst von:
    Wadid Foudhaili, Anouar Nechi, Celine Thermann, Mohammad Al Johmani, Rainer Buchty, Mladen Berekovic, Saleh Mulhem
    Erschienen in:
    Applied Reconfigurable Computing. Architectures, Tools, and Applications (2024)
  12. 2024 | OriginalPaper | Buchkapitel

    Hardware Layout of Independent Metering Control

    Independent Metering (IMV) is a key component of the independent metering control system (IMCS) corresponding to the multi-way valve in the conventional hydraulic system. It refers to a valve architecture that allows for the individual charge and …

    verfasst von:
    Ruqi Ding, Min Cheng
    Erschienen in:
    Independent Metering Electro-Hydraulic Control System (2024)
  13. 15.03.2024 | Online First

    Guarding Against the Unknown: Deep Transfer Learning for Hardware Image-Based Malware Detection

    Malware is increasingly becoming a significant threat to computing systems, and detecting zero-day (unknown) malware is crucial to ensure the security of modern systems. These attacks exploit software security vulnerabilities that are not …

  14. Open Access 27.02.2024 | Online First

    Boosting general-purpose stream processing with reconfigurable hardware

    Reconfigurable devices such as field-programmable gate arrays (FPGAs) offer flexible solutions to workload acceleration with high energy efficiency. Despite such a potential advantage, they often reveal hard to program by application programmers.

  15. 2024 | OriginalPaper | Buchkapitel

    Deep Quantization of Graph Neural Networks with Run-Time Hardware-Aware Training

    In this paper, we investigate the benefits of hardware-aware quantization in the gFADES hardware accelerator targeting Graph Convolutional Networks (GCNs). GCNs are a type of Graph Neural Networks (GNNs) that combine sparse and dense data compute …

    verfasst von:
    Olle Hansson, Mahdieh Grailoo, Oscar Gustafsson, Jose Nunez-Yanez
    Erschienen in:
    Applied Reconfigurable Computing. Architectures, Tools, and Applications (2024)
  16. 2024 | OriginalPaper | Buchkapitel

    Fast and Efficient Hardware Implementation of HQC

    This work presents a hardware design for constant-time implementation of the HQC (Hamming Quasi-Cyclic) code-based key encapsulation mechanism. HQC has been selected for the fourth round of NIST’s Post-Quantum Cryptography standardization process …

    verfasst von:
    Sanjay Deshpande, Chuanqi Xu, Mamuri Nawan, Kashif Nawaz, Jakub Szefer
    Erschienen in:
    Selected Areas in Cryptography – SAC 2023 (2024)
  17. 2023 | OriginalPaper | Buchkapitel

    Computer als Hardware

    Ein Computer lässt sich ganz vereinfacht als eine Maschine darstellen, die Eingaben verarbeitet und Resultate ausgibt. Man nennt dies das EVA-PrinzipEVA-Prinzip für Eingabe-Verarbeitung-Ausgabe.

    verfasst von:
    Claudio Franzetti
    Erschienen in:
    Essenz der Informatik (2023)
  18. 2024 | OriginalPaper | Buchkapitel

    Hardware Acceleration of NTT-Based Polynomial Multiplication in CRYSTALS-Kyber

    CRYSTALS-Kyber is a promising post-quantum encryption candidate and has been selected for standardization. However, its operational efficiency faces challenges due to complex and time-consuming polynomial multiplication, which can be accelerated …

    verfasst von:
    Hang Yang, Rongmao Chen, Qiong Wang, Zixuan Wu, Wei Peng
    Erschienen in:
    Information Security and Cryptology (2024)
  19. 2024 | OriginalPaper | Buchkapitel

    Hardware

    An audio interface is a hardware device that connects to your computer to give you much better sound quality and connection capabilities than the computer’s own sound card. An audio interface will allow you to connect professional microphones and …

    verfasst von:
    Simon Duggal
    Erschienen in:
    Record, Mix and Master (2024)
  20. 2024 | OriginalPaper | Buchkapitel

    A Pipelined AES and SM4 Hardware Implementation for Multi-tasking Virtualized Environments

    Virtualization techniques are becoming increasingly prevalent and are driving trends in hardware development to offer parallelization support for multi-tasking. Existing works on hardware designs of the Advanced Encryption Standard (AES) and SM4 …

    verfasst von:
    Yukang Xie, Hang Tu, Qin Liu, Changrong Chen
    Erschienen in:
    Algorithms and Architectures for Parallel Processing (2024)

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