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The ever increasing demand for improved autonomy in wireless sensor devices, drives the search for new energy-efficient sensor interface topologies in CMOS technology. Recently, time-based conversion has gained a lot of interest due to its high potential to implement highly-digital circuitry. While voltage-based analog integrated circuits suffer from the decreased supply voltage and voltage swing in highly-scaled CMOS technologies, time-based processing takes advantage of the increased timing resolution. However, how do these time-based sensor interface circuits compare to their amplitude-based counterparts fundamentally? To answer this question, theoretical limits are derived in this chapter for both implementations, which shows that the sensor itself is actually the dominant factor in limiting the achievable energy efficiency. Time-based topologies, however, enable the implementation of highly-digital interfaces, which are scalable, area-efficient and have low-voltage potential. These observations are illustrated with several practical designs.
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G. C. Meijer, Smart sensor systems. John Wiley & Sons, 2008.
B. Warneke, M. Last, B. Liebowitz, and K. Pister, “Smart dust: Communicating with a cubic-millimeter,” Computer, vol. 34, pp. 44–51, 2001.
F. Lewis, “Wireless sensor networks,” Smart Environments: Technologies, Protocols, and Applications, 2004.
J.-M. Park and S.-I. Jun, “A resistance deviation-to-time interval converter for resistive sensors,” in IEEE SoC Conference, 2008, pp. 101–104.
Z. Tan, S. H. Shalmany, G. C. Meijer, and M. A. Pertijs, “An energy-efficient 15-bit capacitive-sensor interface based on period modulation,” IEEE J. of Solid-State Circuits, vol. 47, no. 7, pp. 1703–1711, 2012.
H. Danneels, K. Coddens, and G. Gielen, “A fully-digital, 0.3 v, 270 nw capacitive sensor interface without external references,” in proceedings of ESSCIRC, 2011, pp. 287–290.
A. Annema, B. Nauta, R. Van Langevelde, and H. Tuinhout, “Analog circuits in ultra-deep-submicron cmos,” IEEE J. of Solid-State Circuits, vol. 40, no. 1, pp. 132–143, 2005.
M. A. Pertijs and Z. Tan, Energy-Efficient Capacitive Sensor Interfaces. Springer, 2013.
R. Schreier, J. Silva, J. Steensgaard, and G. C. Temes, “Design-oriented estimation of thermal noise in switched-capacitor circuits,” IEEE Trans. on Circuits and Systems-I: Regular Papers, vol. 52, no. 11, pp. 2358–2368, 2005.
J. Van Rethy, H. Danneels, K. Coddens, and G. Gielen, “Capacitance-controlled oscillator optimization for integrated capacitive sensors with time/frequency-based conversion,” in proceedings of EUROSENSORS XXV, 2011, pp. 1301–1304.
M. Shulaker, J. Van Rethy, G. Hills, H. Wei, H.-Y. Chen, G. Gielen, H.-S. P. Wong, and S. Mitra, “Sensor-to-digital interface built entirely with carbon nanotube fets,” IEEE J. of Solid-State Circuits, vol. 49, no. 1, pp. 190–201, 2014.
R. Navid, T. Lee, and R. Dutton, “Minimum achievable phase noise of rc oscillators,” IEEE J. of Solid-State Circuits, vol. 40, no. 3, pp. 630–637, 2005.
S. Gierkink and E. Van Tuij, “A coupled sawtooth oscillator combining low jitter with high control linearity,” IEEE J. of Solid-State Circuits, vol. 37, no. 6, pp. 702–710, 2002.
W. Bracke, P. Merken, R. Puers, and C. Van Hoof, “Ultra-low-power interface chip for autonomous capacitive sensor systems,” IEEE Trans. on Circuits and Systems-I: Regular Papers, vol. 54, no. 1, pp. 130–140, 2007.
A. Hajimiri, S. Limotyrakis, and T. Lee, “Jitter and phase noise in ring oscillators,” IEEE J. of Solid-State Circuits, vol. 34, no. 6, pp. 790–804, 1999.
S. Norsworthy, R. Schreier, and G. Temes, Delta-sigma data converters: theory, design, and simulation. New York, 1997.
J. Van Rethy and G. Gielen, “An energy-efficient capacitance-controlled oscillator-based sensor interface for mems sensors,” in proceedings of A-SSCC, 2013, pp. 443–446.
J. Kim, T.-K. Jang, Y.-G. Yoon, and S. Cho, “Analysis and design of voltage-controlled oscillator based analog-to-digital converter,” IEEE Trans. on Circuits and Systems-I: Regular Papers, vol. 57, no. 1, pp. 18–30, 2010.
V. De Smedt, G. Gielen, and W. Dehaene, “A 40 nm-cmos, 18 μw, temperature and supply voltage independent sensor interface for rfid tags,” in proceedings of A-SSCC, 2013, pp. 125–128.
J. Van Rethy, H. Danneels, and G. Gielen, “Performance analysis of energy-efficient bbpll-based sensor-to-digital converters,” IEEE Trans. on Circuits and Systems-I: Regular Papers, vol. 60, no. 8, pp. 2130–2138, 2013.
J. Van Rethy, H. Danneels, V. De Smedt, W. Dehaene, and G. Gielen, “Supply-noise-resilient design of a bbpll-based force-balanced wheatstone bridge interface in 130-nm cmos,” IEEE J. of Solid-State Circuits, vol. 48, no. 11, pp. 2618–2627, Nov 2013.
- Towards Energy-Efficient CMOS Integrated Sensor-to-Digital Interface Circuits
Jelle Van Rethy
Valentijn De Smedt