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Erschienen in:

01.06.2015

Using constraint programming for the design of network-on-chip architectures

verfasst von: Ayhan Demiriz, Nader Bagherzadeh, Abdulaziz Alhussein

Erschienen in: Computing | Ausgabe 6/2015

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Abstract

NoC technology is composed of packet-based interconnections, where the communication resources are distributed across the network. Therefore, the optimal resource utilization is a crucial consideration for efficient architectural designs. This paper studies the practicality of the Constraint Programming (CP) models for NoC architecture designs that effectively use a regular mesh with wormhole switching and the XY routing. The complexity of the CP models is compared with the earlier Mixed Integer Programming (MIP) models. Practical CP-based mapping and scheduling models are developed and results are reported on the benchmark datasets. Results indicate that mapping and scheduling problems can be solved at near optimality even under relatively shorter run-time limits as compared to those required by the MIP models.

Vorheriger Artikel Design and implementation of counting networks

Nächster Artikel Energy reduction in 3D NoCs through communication optimization

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All the datasets and optimization models can be downloaded at http://tinyurl.com/cdq5l9n.

http://tinyurl.com/cu5txlg.

All the related model and data files can be accessed at http://tinyurl.com/cjseuuz.

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Titel: Using constraint programming for the design of network-on-chip architectures
verfasst von: Ayhan Demiriz
Nader Bagherzadeh
Abdulaziz Alhussein
Publikationsdatum: 01.06.2015
Verlag: Springer Vienna
Erschienen in: Computing / Ausgabe 6/2015
Print ISSN: 0010-485X
Elektronische ISSN: 1436-5057
DOI: https://doi.org/10.1007/s00607-013-0359-4

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