Michael Laurenzano
Abstract
Trace-driven memory simulation tools such as MetaSim Tracer [1] capture the address stream of an application during an instrumented program run. Various statistics can be measured using the in-flight address stream including anticipated cache hit rates. This paper reports on performance improvements of MetaSim Tracer gained by using techniques developed in SimPoint [2]. Concurrent research [3] addresses techniques that can be used to reduce the instrumentation overhead involved in memory tracing, and this work addresses a technique that can be used to decrease the amount of cache simulation that is required on top of this. The result is a tool for trace driven cache simulation that is practical to use for memory performance studies of full sized scientific applications.
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Index Terms
- Low cost trace-driven memory simulation using SimPoint
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