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Reducing write activities on non-volatile memories in embedded CMPs via data migration and recomputation

Published:13 June 2010Publication History

ABSTRACT

Recent advances in circuit and process technologies have pushed non-volatile memory technologies into a new era. These technologies exhibit appealing properties such as low power consumption, non-volatility, shock-resistivity, and high density. However, there are challenges to which we need answers in the road of applying non-volatile memories as main memory in computer systems. First, non-volatile memories have limited number of write/erase cycles compared with DRAM memory. Second, write activities on non-volatile memory are more expensive than DRAM memory in terms of energy consumption and access latency. Both challenges will benefit from reduction of the write activities on the nonvolatile memory.

In this paper, we target embedded Chip Multiprocessors (CMPs) with Scratch Pad Memory (SPM) and non-volatile main memory. We introduce data migration and recomputation techniques to reduce the number of write activities on non-volatile memories. Experimental results show that the proposed methods can reduce the number of writes by 59.41% on average, which means that the non-volatile memory can last 2.8 times as long as before. Meanwhile, the finish time of programs is reduced by 31.81% on average.

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    • Published in

      cover image ACM Conferences
      DAC '10: Proceedings of the 47th Design Automation Conference
      June 2010
      1036 pages
      ISBN:9781450300025
      DOI:10.1145/1837274

      Copyright © 2010 ACM

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      Publication History

      • Published: 13 June 2010

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