skip to main content
research-article

QuickRecall: A HW/SW Approach for Computing across Power Cycles in Transiently Powered Computers

Published:03 August 2015Publication History
Skip Abstract Section

Abstract

Transiently Powered Computers (TPCs) are a new class of batteryless embedded systems that depend solely on energy harvested from external sources for performing computations. Enabling long-running computations on TPCs is a major challenge due to the highly intermittent nature of the power supply (often bursts of < 100ms), resulting in frequent system reboots. Prior work seeks to address this issue by frequently checkpointing system state in flash memory, preserving it across power cycles. However, this involves a substantial overhead due to the high erase/write times of flash memory. This article proposes the use of Ferroelectric RAM (FRAM), an emerging nonvolatile memory technology that combines the benefits of SRAM and flash, to seamlessly enable long-running computations in TPCs. We propose a lightweight, in-situ checkpointing technique for TPCs using FRAM that consumes only 30nJ while decreasing the time taken for saving and restoring a checkpoint to only 21.06μs, which is over two orders of magnitude lower than the corresponding overhead using flash. We have implemented and evaluated our technique, QuickRecall, using the TI MSP430FR5739 FRAM-enabled microcontroller. Experimental results show that our highly-efficient checkpointing translate to significant speedup (1.25x - 8.4x) in program execution time and reduction (∼3x) in application-level energy consumption.

References

  1. Seungjae Baek, Jongmoo Choi, Donghee Lee, and Sam H. Noh. 2013. Energy-efficient and high-performance software architecture for storage class memory. ACM Trans. Embed. Comput. Syst. 12, 3, Article 81. DOI:http://dx.doi.org/10.1145/2442116.2442131 Google ScholarGoogle ScholarDigital LibraryDigital Library
  2. S. C. Bartling, S. Khanna, M. P. Clinton, S. R. Summerfelt, J. A. Rodriguez, and H. P. McAdams. 2013. An 8MHz 75&mu;A/MHz zero-leakage non-volatile logic-based Cortex-M0 MCU SoC exhibiting 100&percnt; digital state retention at VDD&equals;0V with &lt;400ns wakeup and sleep transitions. In Proceedings of the IEEE International Solid-State Circuits Conference. 432--433. DOI:http://dx.doi.org/10.1109/ISSCC.2013.6487802Google ScholarGoogle Scholar
  3. A. Baumann, M. Jung, K. Huber, M. Arnold, C. Sichert, S. Schauer, and R. Brederlow. 2013. A MCU platform with embedded FRAM achieving 350nA current consumption in real-time clock mode with full state retention and 6.5 &mu;s system wakeup time. In Proceedings of the Symposium on VLSI Circuits. C202--C203.Google ScholarGoogle Scholar
  4. S. S. Eaton, D. B. Butler, M. Parris, D. Wilson, and H. McNeillie. 1988. A Ferroelectric Nonvolatile Memory. In Proceedings of the IEEE International Solid-State Circuits Conference. 130--. DOI:http://dx.doi.org/10.1109/ISSCC.1988.663665Google ScholarGoogle Scholar
  5. G. R. Fox, F. Chu, and T. Davenport. 2001. Current and future ferroelectric nonvolatile memory technology. J. Vac. Sci. Technol. B 19, 5, 1967--1971. DOI:http://dx.doi.org/10.1116/1.1406149Google ScholarGoogle ScholarCross RefCross Ref
  6. Keithley-6430-Meter. 2013. Sub femtoamp remote sourceMeter SMU instrument. www.keithley.com/data?asset&equals;386.Google ScholarGoogle Scholar
  7. S. Khanna, S. C. Bartling, M. Clinton, S. Summerfelt, J. A. Rodriguez, and H. P. McAdams. 2013. An FRAM-based nonvolatile logic MCU SoC exhibiting 100&percnt; digital state retention at V DD&equals; 0 V achieving zero leakage with &lt;400-ns wakeup time for ULP applications. IEEE J. Solid-State Circuits 99, 1--12. DOI:http://dx.doi.org/10.1109/JSSC.2013.2284367Google ScholarGoogle Scholar
  8. Love Kothari and Nicholas P. Carter. 2007. Architecture of a self-checkpointing microprocessor that incorporates nanomagnetic devices. IEEE Trans. Comput. 56, 2, 161--173. DOI: http://dx.doi.org/10.1109/TC.2007.21 Google ScholarGoogle ScholarDigital LibraryDigital Library
  9. A. Mirhoseini, E. M. Songhori, and F. Koushanfar. 2013. Idetic: A high-level synthesis approach for enabling long computations on transiently-powered ASICs. In Proceedings of the IEEE International Conference on Pervasive Computing and Communications. 216--224. DOI: http://dx.doi.org/10.1109/PerCom.2013.6526735Google ScholarGoogle Scholar
  10. James S. Plank. 1997. An overview of checkpointing in uniprocessor and distributed systems, focusing on implementation and performance. Tech. Rep. Knoxville, TN. Google ScholarGoogle Scholar
  11. James S. Plank, Micah Beck, Gerry Kingsley, and Kai Li. 1995. Libckpt: Transparent checkpointing under UNIX. In Proceedings of the USENIX Technical Conference (TCON'95). USENIX Association, Berkeley, CA, 18. http://dl.acm.org/citation.cfm?id&equals;1267411.1267429 Google ScholarGoogle ScholarDigital LibraryDigital Library
  12. Benjamin Ransford, Shane Clark, Mastooreh Salajegheh, and Kevin Fu. 2008. Getting things done on computational RFIDs with energy-aware checkpointing and voltage-aware scheduling. In Proceedings of the Conference on Power Aware Computing and Systems (HotPower'08). USENIX Association, Berkeley, CA, 5. http://dl.acm.org/citation.cfm?id&equals;1855610.1855615 Google ScholarGoogle ScholarDigital LibraryDigital Library
  13. Benjamin Ransford, Jacob Sorber, and Kevin Fu. 2011. Mementos: system support for long-running computation on RFID-scale devices. SIGPLAN Not. 46, 3, 159--170. DOI: http://dx.doi.org/10.1145/1961296.1950386 Google ScholarGoogle ScholarDigital LibraryDigital Library
  14. J. Rodriguez, J. Rodriguez-Latorre, C. Zhou, et al. 2013. 180nm FRAM reliability demonstration with ten years data retention at 125°C. In Proceedings of the IEEE International Reliability Physics Symposium. MY.11.1--MY.11.5. DOI: http://dx.doi.org/10.1109/IRPS.2013.6532102Google ScholarGoogle ScholarCross RefCross Ref
  15. Volker Rzehak. 2011. Low-power FRAM microcontrollers and their applications. http://www.ti.com/lit/wp/slaa502/slaa502.pdfGoogle ScholarGoogle Scholar
  16. N. Sakimura, Y. Tsuji, R. Nebashi, et al. 2014. 10.5 A 90nm 20MHz fully nonvolatile microcontroller for standby-power-critical applications. In Proceedings of the IEEE International Solid-State Circuits Conference. 184--185. DOI: http://dx.doi.org/10.1109/ISSCC.2014.6757392Google ScholarGoogle ScholarCross RefCross Ref
  17. V. Saripalli, Guangyu Sun, A Mishra, Yuan Xie, S. Datta, and V. Narayanan. 2011. Exploiting heterogeneity for energy efficiency in chip multiprocessors. IEEE J. Emerging Sel. Top. Circuits Syst. 1, 2, 109--119. DOI: http://dx.doi.org/10.1109/JETCAS.2011.2158343Google ScholarGoogle ScholarCross RefCross Ref
  18. A. Sheikholeslami and P. G. Gulak. 2000. A survey of circuit innovations in ferroelectric random-access memories. Proc. IEEE 88, 5, 667--689. DOI: http://dx.doi.org/10.1109/5.849164Google ScholarGoogle ScholarCross RefCross Ref
  19. D. Takashima. 2011. Overview of FeRAMs: Trends and perspectives. In Proceedings of the 11th Annual Non-Volatile Memory Technology Symposium. 1--6. DOI: http://dx.doi.org/10.1109/NVMTS.2011.6137107Google ScholarGoogle ScholarCross RefCross Ref
  20. Texas Instruments. 2013a. MSP430F543xA datasheet. (August 2013). http://www.ti.com/lit/ds/symlink/msp430f5438a.pdf.Google ScholarGoogle Scholar
  21. Texas Instruments. 2013b. MSP430FR573x datasheet. (April 2013). http://www.ti.com/lit/ds/symlink/msp430fr5739.pdf.Google ScholarGoogle Scholar
  22. K. R. Udayakumar, T. San, J. Rodriguez, et al. 2013. Low-power ferroelectric random access memory embedded in 180nm analog friendly CMOS technology. In Proceedings of the 5th IEEE International Memory Workshop. 128--131. DOI: http://dx.doi.org/10.1109/IMW.2013.6582115Google ScholarGoogle ScholarCross RefCross Ref
  23. Rangharajan Venkatesan, Vivek Kozhikkottu, Charles Augustine, Arijit Raychowdhury, Kaushik Roy, and Anand Raghunathan. 2012. TapeCache: A high density, energy efficient cache based on domain wall memory. In Proceedings of the 2012 ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED'12). ACM, New York, 185--190. DOI: http://dx.doi.org/10.1145/2333660.2333707 Google ScholarGoogle ScholarDigital LibraryDigital Library
  24. Yiqun Wang, Yongpan Liu, Shuangchen Li, Daming Zhang, Bo Zhao, Mei-Fang Chiang, Yanxin Yan, Baiko Sai, and Huazhong Yang. 2012. A 3&mu;s wake-up time nonvolatile processor based on ferroelectric flip-flops. In Proceedings of the European Solid-State Circuits Conference. 149--152. DOI: http://dx.doi.org/10.1109/ESSCIRC.2012.6341281Google ScholarGoogle ScholarCross RefCross Ref
  25. Yong Yang, Lili Wang, Dong Kun Noh, Hieu Khac Le, and Tarek F. Abdelzaher. 2009. SolarStore: enhancing data reliability in solar-powered storage-centric sensor networks. In Proceedings of the 7th International Conference on Mobile Systems, Applications, and Services (MobiSys'09). ACM, New York, 333--346. DOI: http://dx.doi.org/10.1145/1555816.1555850 Google ScholarGoogle ScholarDigital LibraryDigital Library
  26. Wingkei Yu, S. Rajwade, Sung-En Wang, B. Lian, G. E. Suh, and E. Kan. 2011. A nonvolatile microcontroller with integrated floating-gate transistors. In Proceedings of the IEEE/IFIP 41st International Conference on Dependable Systems and Networks Workshops. 75--80. DOI: http://dx.doi.org/10.1109/DSNW.2011.5958839 Google ScholarGoogle ScholarDigital LibraryDigital Library
  27. M. Zwerg, A. Baumann, R. Kuhn, M. Arnold, R. Nerlich, M. Herzog, R. Ledwa, C. Sichert, V. Rzehak, P. Thanigai, and B. O. Eversmann. 2011. An 82 &mu;A/MHz microcontroller with embedded FeRAM for energy harvesting applications. In Proceedings of the IEEE International Solid-State Circuits Conference. 334--336. DOI: http://dx.doi.org/10.1109/ISSCC.2011.5746342Google ScholarGoogle Scholar

Index Terms

  1. QuickRecall: A HW/SW Approach for Computing across Power Cycles in Transiently Powered Computers

      Recommendations

      Comments

      Login options

      Check if you have access through your login credentials or your institution to get full access on this article.

      Sign in

      Full Access

      • Published in

        cover image ACM Journal on Emerging Technologies in Computing Systems
        ACM Journal on Emerging Technologies in Computing Systems  Volume 12, Issue 1
        July 2015
        210 pages
        ISSN:1550-4832
        EISSN:1550-4840
        DOI:10.1145/2810396
        Issue’s Table of Contents

        Copyright © 2015 ACM

        Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than the author(s) must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected].

        Publisher

        Association for Computing Machinery

        New York, NY, United States

        Publication History

        • Published: 3 August 2015
        • Accepted: 1 October 2014
        • Revised: 1 August 2014
        • Received: 1 January 2014
        Published in jetc Volume 12, Issue 1

        Permissions

        Request permissions about this article.

        Request Permissions

        Check for updates

        Qualifiers

        • research-article
        • Research
        • Refereed

      PDF Format

      View or Download as a PDF file.

      PDF

      eReader

      View online with eReader.

      eReader