Sarita V. Adve
Mark D. Hill
- AdH89.S.V. ADVE and M. D. HILL, Weak Ordering - A New Definition And Some Implications, Computer Sciences Technical Report #902, University of Wisconsin. Madison, December 1989.Google Scholar
- ASH88.A. AGARWAL R. SIMONL M. HORoWrrZ and J. HENNESSY, An Evaluation of Directory Schemes for Cache Coherence. lSth Atmual International Symposium on Computer Architecture, Honolulu, Hawaii, June 1988, 280-289. Google ScholarDigital Library
- ArB86.J. ARCI-IIBALD and }. BAER, Cache Coherence Protocols: Evaluation Using a Multiprocessor Simulation Model, ACM Transactions on Computer Systems 4, 4 (November 1986), 273- 298. Google ScholarDigital Library
- BeG81.P.A. BERNs'rE~ and N. GOODMAN, Concurrency Control in Distributed Systems, Computing Surveys 13, 2 (June, 1981), 185-221. Google ScholarDigital Library
- BNR89.R. BISIANI, A. NOWATZYK and M. RAWSHANKAR, Coherent Shared Memory on a Distributed Memory Machine, Pro(:. International Conference on Parallel Processing, August 1989, 1-133-141.Google Scholar
- BMW85.W.C. BR^m't.EY, K. P. McAmJ~ and J. WEISS, RP3 Process-Memory Element, international Conference on Parallel Processing, August 1985, 772-78t.Google Scholar
- Col84.W.W. COLLIER, Architectures for Systems of Parallel Processes, Technical Report Tech, Rep. 003253, IBM Corp., Poughkeepsie, N.Y., 27 January 1984.Google Scholar
- Col90.W.W. COtJJ~:R, Reasoning about Paratlel Architectures, Prentice-Hail, Inc., To appear 1990.Google Scholar
- DeM88.R. DE LEONE and O. L. MANGAS^RIAN, Asynchronous Parallel Successive Overrelaxation for the Symmetric Linear Complementarity Problem, Mathematical Programming 42(1988), 347-361. Google ScholarDigital Library
- DSB86.M. Dunols, C. SC}t~ICH and F. A. BRIC,,GS, Memory Access Buffering in Multiprocessors, Pro(:. Thirteenth Annual International Symposium on Computer Architecture /4, 2 (June 1986), 434-442. Google ScholarDigital Library
- DSB88.M. DUBols, C. SCHEURICI! and F. A. BRIGGS, Synchronization, Coherence, and Event Ordering in Multiprocessors, IEEE Computer 21. 2 (February 1988), 9-21. Google ScholarDigital Library
- GVW89.J.R. GOODMAN, M. K. VERNON and P. J. WOEST, Efficient Synchronization Primitives for Large- Scale Cache-Coherent Multiprocessors, Pro(:. Third lnternatwnal Conference on Architectural Support for Programming Languages and Operating Systems, Boston, April 1989, 64-75, Google ScholarDigital Library
- Kro81.D. KROFT, Lock-up-Free Instruction Fetch/Prefetch Cache Organization, Proc. Eighth Symposium on Computer Architecture, May 1981, 81-87. Google ScholarDigital Library
- Lam78.L. LAMPORT, Time, Clocks, and the Ordering of Events in a Distributed System. Communications of the ACM 21, 7 (July 1978), 558-565. Google ScholarDigital Library
- Lam79.L. LAMPORT, How to Make a Multipmcessor Computer That Correctly Executes Multipmcess Programs, IEEE Trans. on Computers C.2& 9 (September 1979), 690-691.Google ScholarDigital Library
- Lam86.L. LAMPORT, The Mutual Exclusion Problem, ' Parts I and Ii , Journal of the Association of Computing Machinery 33, 2 (April 1986), 313- 348. Google ScholarDigital Library
- NeM89.R. NEI'ZER and B. MITJ~t, Detecting Data Races in Parallel Program Executions, Computer Sciences Technical Report #894, University of Wisconsin, Madison, November 1989.Google Scholar
- Pap86.C. PAP~d3tMrrPaOU, The Theory of Database Concurrency Control, Computer Science Press. Rockville, Maryland 20850, 1986. Google ScholarDigital Library
- PBG85.G.F. I~S'TER, W. C. B~~, D. A. GF, OaOE, S. L. HARVEY, W, J. ~~P,, K. P. McAuu~. E. A. MELTON, V. A. NORTON and J. WEISS, The IBM Research Parallel Processor Prototype (RP3): introduction and Architecutre. International Conference on Parallel Processing. August 1985, 764-771.Google Scholar
- RuS84.L. RUDOLPH and Z. SEOALL, Dynamic Decentralized Cache Schemes for MIMD Parallel Processors, Pro(=. Eleventh International Symposium on Conputer Architecture, June 1984, 340-347. Google ScholarDigital Library
- ScD87.C. SQ4EURICH and M. DLrBOIS, Correct Memory Operation of Cache-Based Multipmcessors, Proc. Fourteenth Annual International Symposium on Computer Architecture, Pittsburgh, PA, June 1987, 234.243. Google ScholarDigital Library
- ScD88.C. S~CH and M. DUSOlS, Concurrent Miss Reaoludon in Multiprocesu~r Cadres, Proceedings of the 1988 International Conference on Parallel Processing, University Park PA, August, 1988. i- 118-125.Google Scholar
- Sch89.C, E. S~cH, Access Ordering and Coherence in Shared Memory Multiprocessors, Ph.D. Thesis, Department of Computer Engineering. Technical Report CENG 89-19. University of Southern California. May 1989.Google Scholar
- ShS88.D. SHASHA and M. SNIR, Efficient and Correct Execution of Parallel Programs that Share Memory, ACM Trans. on Programming Languages and Systems 10, 2 (April 1988), 282- 312. Google ScholarDigital Library
Index Terms
- Weak ordering—a new definition
Recommendations
Weak ordering—a new definition
Special Issue: Proceedings of the 17th annual international symposium on Computer ArchitectureA memory model for a shared memory, multiprocessor commonly and often implicitly assumed by programmers is that of sequential consistency. This model guarantees that all memory accesses will appear to execute atomically and in program order. An ...
Weak ordering—a new definition
ISCA '90: Proceedings of the 17th annual international symposium on Computer ArchitectureA memory model for a shared memory, multiprocessor commonly and often implicitly assumed by programmers is that of sequential consistency. This model guarantees that all memory accesses will appear to execute atomically and in program order. An ...
A Unified Formalization of Four Shared-Memory Models
The authors present a data-race-free-1, shared-memory model that unifies four earliermodels: weak ordering, release consistency (with sequentially consistent specialoperations), the VAX memory model, and data-race-free-0. Data-race-free-1 unifies ...
Comments