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Verified compilation of CakeML to multiple machine-code targets

Published:16 January 2017Publication History

ABSTRACT

This paper describes how the latest CakeML compiler supports verified compilation down to multiple realistically modelled target architectures. In particular, we describe how the compiler definition, the various language semantics, and the correctness proofs were organised to minimize target-specific overhead. With our setup we have incorporated compilation to four 64-bit architectures, ARMv8, x86-64, MIPS-64, RISC-V, and one 32-bit architecture, ARMv6. Our correctness theorem allows interference from the environment: the top-level correctness statement takes into account execution of foreign code and per-instruction interference from external processes, such as interrupt handlers in operating systems. The entire CakeML development is formalised in the HOL4 theorem prover.

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              • Published in

                cover image ACM Other conferences
                CPP 2017: Proceedings of the 6th ACM SIGPLAN Conference on Certified Programs and Proofs
                January 2017
                234 pages
                ISBN:9781450347051
                DOI:10.1145/3018610

                Copyright © 2017 ACM

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                Association for Computing Machinery

                New York, NY, United States

                Publication History

                • Published: 16 January 2017

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