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Hardware-assisted Isolation in a Multi-tenant Function-based Dataplane

Published:28 March 2018Publication History

ABSTRACT

Existing software dataplanes that run network functions inside VMs or containers can provide either performance (by dedicating CPU cores) or multiplexing (by context switching), but not both at once. Function-based dataplane architectures by replacing VMs and containers with function calls promise to achieve multiplexing and performance at the same time. However, they compromise memory isolation between tenants by forcing them to use a shared memory address space.

In this paper, we show that an operating system-like management layer for modules in a function-based data plane can offer OS-like constructs such as performance and memory isolation. To provide memory isolation, we leverage new Intel CPU extensions (MPX) to create coarse-grained heap and stack protection even for legacy code written in unsafe native languages such as C. In addition, we use programmable NIC offloads to distribute load across cores as well as to prevent batch fragmentation when processing complex service graphs. Our preliminary evaluation shows the limitations of existing techniques that require heavy weight memory isolation or incur cross-core overheads.

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      • Published in

        cover image ACM Conferences
        SOSR '18: Proceedings of the Symposium on SDN Research
        March 2018
        195 pages
        ISBN:9781450356640
        DOI:10.1145/3185467

        Copyright © 2018 ACM

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        Publication History

        • Published: 28 March 2018

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        • short-paper
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        Acceptance Rates

        Overall Acceptance Rate7of43submissions,16%

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