Sunghyun Lee
ABSTRACT
This paper presents a method of intra-task dynamic voltage scaling (DVS) for SoC design with hierarchical FSM and synchronous dataflow model (in short, HFSM-SDF model). To have an optimal intra-task DVS, exact execution paths need to be determined in compile time or runtime. In general programs, since determining exact execution paths in compile time or runtime is not possible, existing methods assume worst/average-case execution paths and take static voltage scaling approaches. In our work, we exploit a property of HFSM-SDF model to calculate exact execution paths in runtime. With the information of exact execution paths, our DVS method can calculate exact remaining workload. The exact workload enables to calculate optimal voltage level which gives optimal energy consumption while satisfying the given timing constraint. Experiments show the effectiveness of the presented method in low-power design of an MPEG4 decoder system.
- Cadence Design Systems, Inc., "Virtual Component Co-design (VCC)," available at http://www.cadence.com/products/vcc.html.Google Scholar
- Synopsys, Inc., "CoCentric System Studio," available at http://www.synopsys.com/products/cocentric_studio/cocentric_studio.html.Google Scholar
- J. Buck and R. Vaidyanathan, "Heterogeneous Modeling and Simulation of Embedded Systems in El Greco," Proc. Int'l Workshop on Hardware-Software Codesign, pp. 142--146, May 2000. Google ScholarDigital Library
- I. Hong, D. Kirovski, G. Qu, M. Potkonjak, and M. B. Srivastava, "Power Optimization of Variable Voltage Core-Based Systems," IEEE Transactions on Computer-Aided Design, vol. 18, no. 12, pp. 1702--1713, Dec. 1999. Google ScholarDigital Library
- Y. Shin and K. Choi, "Power Conscious Fixed Priority Scheduling for Hard Real-Time Systems," Proc. Design Automation Conf., pp. 134--139, 1999. Google ScholarDigital Library
- G. Quan and X. Hu, "Energy Efficient Fixed-Priority Scheduling for Real-Time Systems on Variable Voltage Processors," Proc. Design Automation Conf., pp. 828--833, 2001. Google ScholarDigital Library
- D. Shin, J. Kim, and S. Lee, "Intra-Task Voltage Scheduling for Low-Energy Hard Real-Time Applications," IEEE Design & Test of Computers, vol. 18, no. 2, pp. 20--30, Mar. 2001. Google ScholarDigital Library
- C. Im, H. Kim, and S. Ha, "Dynamic Voltage Scheduling Technique for Low-Power Multimedia Applications Using Buffers," Proc. Int'l Symposium on Low Power Electronics and Design, pp. 34--39, Aug. 2001. Google ScholarDigital Library
- T. Simunic, L. Benini, A. Acquaviva, P. Glynn, and G. De Micheli, "Dynamic Voltage Scaling and Power Management for Portable Systems," Proc. Design Automation Conf., pp. 524--529, 2001. Google ScholarDigital Library
- "The Ptolemy Project," available at http://ptolemy.eecs.berkeley.edu/.Google Scholar
- B. Lee, "Specification and Design of Reactive Systems," Ph.D thesis, Memorandum UCB/ERL M00/29, Electronics Research Laboratory, Univ. of California, Berkeley, May 2000. Google ScholarDigital Library
- "MPEG4 Industry Forum," available at http://www.m4if.org/.Google Scholar
- T. D. Burd and R. W. Brodersen, "Design Issues for Dynamic Voltage Scaling," Proc. Int'l Symposium on Low Power Electronics and Design, pp. 9--14, Aug. 2000 Google ScholarDigital Library
- T. D. Burd, T. A. Pering, A. J. Stratakos, and R. W. Brodersen, "A Dynamic Voltage Scaled Microprocessor System," IEEE Journal of Solid-State Circuits, vol. 35, no. 11, pp. 1571--1580, Nov. 2000.Google ScholarCross Ref
Index Terms
- An intra-task dynamic voltage scaling method for SoC design with hierarchical FSM and synchronous dataflow model
Recommendations
The limit of dynamic voltage scaling and insomniac dynamic voltage scaling
Dynamic voltage scaling (DVS) is a popular approach for energy reduction of integrated circuits. Current processors that use DVS typically have an operating voltage range from full to half of the maximum Vdd. However, there is no fundamental reason why ...
Bounds on power savings using runtime dynamic voltage scaling: an exact algorithm and a linear-time heuristic approximation
ISLPED '05: Proceedings of the 2005 international symposium on Low power electronics and designDynamic voltage/frequency scaling (DVFS) has been shown to be an efficient power/energy reduction technique. Various runtime DVFS policies have been proposed to utilize runtime DVFS opportunities. However, it is hard to know if runtime DVFS ...
Intraprogram dynamic voltage scaling: Bounding opportunities with analytic modeling
Dynamic voltage scaling (DVS) has become an important dynamic power-management technique to save energy. DVS tunes the power-performance tradeoff to the needs of the application. The goal is to minimize energy consumption while meeting performance ...
Comments