ABSTRACT
In this paper we propose a novel special-purpose data memory subsystem, called Xtream-Fit, aimed at achieving high energy-delay efficiency for streaming media applications. A key novelty of Xtream-Fit is that it exposes a single customization parameter, thus enabling a very simple and yet effective design space exploration methodology. A second key contribution of this work is the ability to achieve very high energy-delay efficiency through a synergistic combination of: (1) special purpose memory subsystem components, namely, a Streaming Memory and Scratch-Pad Memory; and (2) a novel task-based execution model that exposes/enhances opportunities for efficient prefetching, and aggressive dynamic energy conservation techniques targeting on-chip and off-chip memory components. Extensive experimental results show that Xtream-Fit reduces energy-delay product by 46% to 83%, as compared to general-purpose memory subsystems enhanced with state of the art Cache Decay and SDRAM power mode control policies.
- F. Catthoor et al. Custom Memory Management Methodology: Exploration of Memory Organization for Embedded Multimedia System Design. KAP, 1998. Google ScholarDigital Library
- P. R. Panda et al. Data and Memory Optimization Techniques for Embedded Systems. ACM TODAES, 6(2), 2001. Google ScholarDigital Library
- P.R. Panda et al. Memory Issues in Embedded Systems-on-Chip: Optimizations and Exploration. KAP, 1998. Google ScholarDigital Library
- J. Montanaro et al. A 160MHz 32b 0.5W CMOS RISC Microprocessor. In ISSCC Digest of Technical Papers, 1996.Google Scholar
- C. Lee et al. MediaBench: A Tool for Evaluating and Synthesizing Multimedia and Communications Systems. In MICRO, 1997. Google ScholarDigital Library
- V. Delaluz et al. Scheduler-Based DRAM Energy Management. In DAC, 2002. Google ScholarDigital Library
- X. Fan et al. Memory Controller Policies for DRAM Power Management. In ISLPED, 2001. Google ScholarDigital Library
- S. Kaxiras et al. Cache Decay: Exploiting Generational Behavior to Reduce Cache Leakage Power. In ISCA, 2001. Google ScholarDigital Library
- H. Zhou et al. Adaptive Mode Control: A Static-Power-Efficient Cache Design. In PACT, 2001. Google ScholarDigital Library
- C. Hughes et al. Saving Energy with Architectural and Frequency Adaptations for Multimedia Applications. In MICRO, 2001. Google ScholarDigital Library
- C. Hughes et al. Variability in the Execution of Multimedia Applications and Implications for Architecture. In ISCA, 2001. Google ScholarDigital Library
- B. Khailany et al. Imagine: Media Processing with Streams. In IEEE Micro, 2001. Google ScholarDigital Library
- S. Rixner et al. Memory Access Scheduling. In ISCA, 2000. Google ScholarDigital Library
- M. Kandemir et al. Dynamic Management of Scratch-Pad Memory Space. In DAC, 2001. Google ScholarDigital Library
- P. R. Panda et al. Efficient Utilization of Scratch-Pad Memory in Embedded Processor Applications. In ETDC, 1997. Google ScholarDigital Library
- O. Unsal et al. Cool-Cache for Hot Multimedia. In MICRO, 2001. Google ScholarDigital Library
- O. Unsal et al. On Memory Behavior of Scalars in Embedded Multimedia Systems. In WMPI, ISCA, 2001.Google Scholar
- http://www.rambus.com/.Google Scholar
- http://www.micron.com/.Google Scholar
- http://www.samsung.com/.Google Scholar
- D. H. Albonesi. Selective Cache Ways: On-demand Cache Resource Allocation. In MICRO, 1999. Google ScholarDigital Library
- L. Benini et al. A Recursive Algorithm for Low-Power Memory Partitioning. In ISLPED, 2000. Google ScholarDigital Library
- D. Chiou et al. Application-Specific Memory Management in Embedded Systems Using Software Controlled Caches. In DAC, 2000. Google ScholarDigital Library
- V. Milutinovic et al. The Split Temporal/Spatial Cache: Initial Performance Analysis. In SCIzzL, 1996.Google Scholar
- P. Ranganathan et al. Reconfigurable Caches and their Application to Media Processing. In ISCA, 2000. Google ScholarDigital Library
- W. Tang et al. Fetch Size Adaptation vs. Stream Buffer for Media Benchmarks. In WMSP, MICRO, 2001.Google Scholar
- S. VanderWiel et al. When Caches Are Not Enough: Data Prefetching Techniques. IEEE Computer, 30(7), 1997. Google ScholarDigital Library
- H. Lee et al. Region-Based Caching: An Energy-Delay Efficient Memory Architecture for Embedded Processors. In CASES, 2000. Google ScholarDigital Library
- D. Burger et al. Evaluating Future Microprocessors: The SimpleScalar Tool Set Technical Report, University of Wisconsin, Madison, 1996.Google Scholar
- S. Wilton et al. An Enhanced Access and Cycle Time Model for On-chip Caches. Technical Report, DEC WRL, 1994.Google Scholar
- S.-H. Yang et al. An IC/Arch Approach to Reducing Leakage in Deep-Submicron High Performance I-Caches. In HPCA, 2001. Google ScholarDigital Library
Index Terms
- Xtream-Fit: an energy-delay efficient data memory subsystem for embedded media processing
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