Abstract
Power density continues to increase exponentially with each new technology generation, posing a major challenge for thermal management in modern processors. Much past work has examined microarchitectural policies for reducing total chip power, but these techniques alone are insufficient if not aimed at mitigating individual hotspots. The industry's current trend has been toward multicore architectures, which provide additional opportunities for dynamic thermal management. This paper explores various thermal management techniques that exploit the distributed nature of multicore processors. We classify these techniques in terms of core throttling policy, whether that policy is applied locally to a core or to the processor as a whole, and process migration policies. We use Turandot and a HotSpot-based thermal simulator to simulate a variety of workloads under thermal duress on a 4-core PowerPCTMprocessor. Using benchmarks from the SPEC 2000 suite we characterize workloads in terms of instruction throughput as well as their effective duty cycles. Among a variety of options we find that distributed controltheoretic DVFS alone improves throughput by 2.5X under our test conditions. Our final design involves a PI-based core thermal controller and an outer control loop to decide process migrations. This policy avoids all thermal emergencies and yields an average of 2.6X speedup over the baseline across all workloads.
- {1} ACPI - Advanced Configuration and Power Interface. www.acpi.info, 2005.Google Scholar
- {2} S. Balakrishnan et al. The Impact of Performance Asymmetry in Emerging Multicore Architectures. In Proc. of the 32nd Intl. Symp. on Computer Architecture, June 2005. Google ScholarDigital Library
- {3} S. Borkar. Design Challenges of Technology Scaling. IEEE Micro, pages 23-29, July/Aug. 1999. Google ScholarDigital Library
- {4} D. Brooks et al. Power-A ware Microarchitecture: Design and Modeling Challenges for Next-Generation Microprocessors. IEEE Micro, 20(6):26-44, Nov/Dec. 2000. Google ScholarDigital Library
- {5} D. Brooks and M. Martonosi. Dynamic Thermal Management For High-Performance Microprocessors. In Proc. of the 7th Intl. Symp. on High-Performance Computer Architecture, Jan. 2001. Google ScholarDigital Library
- {6} P. Chaparro et al. Distributing the Frontend for Temperature Reduction. In Proc. of the 11th Intl. Symp. on High-Performance Computer Architecture, Feb. 2005. Google ScholarDigital Library
- {7} P. Chaparro, J. González, and A. González. Thermal-Effective Clustered Microarchitectures. In Proc. of the First Workshop on Temperature-Aware Computer Systems, June 2004. Google ScholarDigital Library
- {8} J. Clabes et al. Design and Implementation of the POWER5TM Microprocessor. In Proc. of the 2004 Intl. Solid-State Circuits Conf., Feb. 2004. Google ScholarDigital Library
- {9} J. Donald and M. Martonosi. Temperature-Aware Design Issues for SMT and CMP Architectures. In Proc. of the 5th Workshop on Complexity-Effective Design, June 2004.Google Scholar
- {10} J. Donald and M. Martonosi. Leveraging Simultaneous Multithreading for Adaptive Thermal Control. In Proc. of the Second Workshop on Temperature-Aware Computer Systems, June 2005.Google Scholar
- {11} S. Ghiasi and D. Grunwald. Design Choices for Thermal Control in Dual-Core Processors. In Proc. of the 5th Workshop on Complexity-Effective Design, June 2004.Google Scholar
- {12} A. González. Research Challenges on Temperature-A ware Computer Systems (panel). In Second Workshop on Temperature-Aware Computer Systems. Intel Corp., June 2005.Google Scholar
- {13} S. Gunther et al. Managing the Impact of Increasing Microprocessor Power Consumption. Intel Technology Journal, Q1(5), June 2001.Google Scholar
- {14} Y. Han, I. Koren, and C. A. Moritz. Temperature Aware Floorplanning. In Proc. of the Second Workshop on Temperature-Aware Computer Systems, June 2005.Google Scholar
- {15} J. Hasan et al. Heat Stroke: Power-Density-Based Denial of Service in SMT. In Proc. of the 11th Intl. Symp. on High-Performance Computer Architecture, Feb. 2005. Google ScholarDigital Library
- {16} J. L. Henning. SPEC CPU2000: Measuring CPU Performance in the New Millennium. IEEE Computer, 33(7):28-35, July 2000. Google ScholarDigital Library
- {17} S. Heo, K. Barr, and K. Asanovic. Reducing Power Density through Activity Migration. In Proc. of the Intl. Symp. on Low Power Electronics and Design, Aug. 2003. Google ScholarDigital Library
- {18} W. Huang et al. Compact Thermal Modeling for Temperature-Aware Design. In Proc. of the 41st Design Automation Conf., June 2004. Google ScholarDigital Library
- {19} A. Iyer and D. Marculescu. Power Efficiency of Multiple Clock Multiple Voltage Cores. In Proc. of the IEEE/ACM Conf. on Computer-Aided Design, Nov. 2002. Google ScholarDigital Library
- {20} S. Kaxiras et al. Comparing Power Consumption of an SMT and a CMP DSP for Mobile Phone Workloads. In Proc. of the 2001 Intl. Conf. on Compilers, Architecture, and Synthesis for Embedded Systems, Nov. 2001. Google ScholarDigital Library
- {21} J. Li and J. Martinez. Power-Performance Implications of Thread-level Parallelism on Chip Multiprocessors. In P=AC2: IBM Conf. on Architectures, Compilers, and Circuits, Sept. 2005.Google Scholar
- {22} Y. Li et al. Understanding the Energy Efficiency of Simultaneous Multithreading. In Proc. of the Intl. Symp. on Low Power Electronics and Design, Aug. 2004. Google ScholarDigital Library
- {23} Y. Li et al. Performance, Energy, and Thermal Considerations for SMT and CMP Architectures. In Proc. of the 11th Intl. Symp. on High-Performance Computer Architecture, Feb. 2005. Google ScholarDigital Library
- {24} Z. Lu et al. Reducing Multimedia Decode Power Using Feedback Control. In Proc. of the Intl. Conf. on Computer Design, Oct. 2003. Google ScholarDigital Library
- {25} J. McGregor. x86 Power and Thermal Management. Microprocessor Report, Dec. 2004.Google Scholar
- {26} A. Merkel, A. Weissel, and F. Bellosa. Event-Driven Thermal Management in SMP Systems. In Proc. of the Second Workshop on Temperature-Aware Computer Systems, June 2005.Google Scholar
- {27} M. Moudgill, J.-D. Wellman, and J. H. Moreno. Environment for PowerPC Microarchitecture Exploration. IEEE Micro, 19(3):15-25, May/June 1999. Google ScholarDigital Library
- {28} C. D. Patel. Smart Chip, System and Data Center: Dynamic Provisioning of Power and Cooling from Chip Core to the Cooling Tower (keynote). In Second Workshop on Temperature-Aware Computer Systems. HP Labs, June 2005.Google Scholar
- {29} M. D. Powell, M. Gomaa, and T. N. Vijaykumar. Heat-and-Run: Leveraging SMT and CMP to Manage Power Density Through the Operating System. In Proc. of the 11th Intl. Conf. on Architectural Support for Programming Languages and Operating Systems, Oct. 2004. Google ScholarDigital Library
- {30} L. Shang et al. Thermal Modeling, Characterization and Management of On-Chip Networks. In Proc. of the 37th Intl. Symp. on Microarchitecture, Dec. 2004. Google ScholarDigital Library
- {31} T. Sherwood et al. Automatically Characterizing Large Scale Program Behavior. In Proc. of the 10th Intl. Conf. on Architectural Support for Programming Languages and Operating Systems, Oct. 2002. Google ScholarDigital Library
- {32} K. Skadron, T. Abdelzaher, and M. R. Stan. Control-Theoretic Techniques and Thermal-RC Modeling for Accurate and Localized Dynamic Thermal Management. In Proc. of the 8th Intl. Symp. on High-Performance Computer Architecture, Feb. 2002. Google ScholarDigital Library
- {33} K. Skadron et al. Temperature-Aware Microarchitecture. In Proc. of the 30th Intl. Symp. on Computer Architecture, Apr. 2003. Google ScholarDigital Library
- {34} D. C. Steere et al. A Feedback-driven Proportion Allocator for Real-rate Scheduling. In Proc. of the Third Symp. on Operating System Design and Implementation, Feb. 1999. Google ScholarDigital Library
- {35} A. Weissel and F. Bellosa. Dynamic Thermal Management for Distributed Systems. In Proc. of the First Workshop on Temperature-Aware Computer Systems, June 2004.Google Scholar
- {36} Q. Wu et al. Formal Online Methods for Voltage/Frequency Control in Multiple Clock Domain Microprocessors. In Proc. of the 11th Intl. Conf. on Architectural Support for Programming Languages and Operating Systems, Oct. 2004. Google ScholarDigital Library
- {37} Q. Wu et al. A Dynamic Compilation Framework for Controlling Microprocessor Energy and Performance. In Proc. of the 38th Intl. Symp. on High-Performance Computer Architecture, Feb. 2005. Google ScholarDigital Library
- {38} Q. Wu et al. Voltage and Frequency Control with Adaptive Reaction Time in Multiple-Clock-Domain Processors. In Proc. of the 11th Intl. Symp. on High-Performance Computer Architecture, Nov. 2005. Google ScholarDigital Library
Index Terms
- Techniques for Multicore Thermal Management: Classification and New Exploration
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