skip to main content
research-article

Multi-core composability in the face of memory-bus contention

Published:01 October 2013Publication History
Skip Abstract Section

Abstract

In this paper we describe the problem of achieving composability of independently developed real-time subsystems to be executed on a multi-core platform, and we provide a solution to tackle it. We evaluate existing work for achieving real-time predictability on multi-cores and illustrate their lack with respect to composability.

To address composability we present a multi-resource server-based scheduling technique to provide predictable performance when composing multiple subsystems on a shared multi-core platform. To achieve composability on multi-core platforms, we propose to add memory bandwidth as an additional server resource. Tasks within our multi-resource servers are guaranteed both CPU- and memory bandwidth; thus the performance of a server will become independent of resource usage by tasks in other servers. We are currently implementing multi-resource servers for the Enea OSE operating system for a Freescale P4080 8-core processor, to be tested with software for a 3G-basestation.

References

  1. H. Kopetz and N. Suri. Compositional design of rt systems: A conceptual basis for specification of linking interfaces. In 6th IEEE International Symposium on Object-Oriented Real-Time Distributed Computing (ISORC' 03), pages 51--57, 2003. Google ScholarGoogle ScholarDigital LibraryDigital Library
  2. I. Shin and I. Lee. Periodic Resource Model for Compositional Real-Time Guarantees. In Proc. 24th IEEE Real-Time Systems Symposium (RTSS' 03), pages 2--13, December 2003. Google ScholarGoogle ScholarDigital LibraryDigital Library
  3. J. P. Lehoczky, L. Sha, and J. K. Strosnider. Enhanced aperiodic responsiveness in hard real-time environments. In Proc. 8th IEEE Real-Time Systems Symposium (RTSS' 87), pages 261--270, December 1987.Google ScholarGoogle Scholar
  4. B. Sprunt, L. Sha, and J. P. Lehoczky. Aperiodic Task Scheduling for Hard Real-Time Systems. Real-Time Systems, 1(1): 27--60, June 1989.Google ScholarGoogle ScholarCross RefCross Ref
  5. M. Spuri and G. C. Buttazzo. Efficient Aperiodic Service under Earliest Deadline Scheduling. In Proc. 15th IEEE Real-Time Systems Symposium (RTSS' 94), December 1994.Google ScholarGoogle ScholarCross RefCross Ref
  6. G. C. Buttazzo, editor. Hard Real-time Computing Systems. Springer-Verlag, 2nd ed., 2005. Google ScholarGoogle ScholarDigital LibraryDigital Library
  7. L. Almeida and P. Pedreiras. Scheduling within Temporal Partitions: Response-Time Analysis and Server Design. In ACM Intl. Conference on Embedded Software(EMSOFT' 04), pages 95--103, September 2004. Google ScholarGoogle ScholarDigital LibraryDigital Library
  8. G. Lipari and E. Bini. Resource Partitioning among Real-time Applications. In Proc. of the 15th Euromicro Conf. on Real-Time Systems (ECRTS' 03), pages 151--158, July 2003.Google ScholarGoogle ScholarCross RefCross Ref
  9. R. I. Davis and A. Burns. Hierarchical Fixed Priority Pre-emptive Scheduling. In Proc. 26th IEEE Real-Time Systems Symposium (RTSS' 05), pages 389--398, December 2005. Google ScholarGoogle ScholarDigital LibraryDigital Library
  10. I. Shin, A. Easwaran, and I. Lee. Hierarchical Scheduling Framework for Virtual Clustering of Multiprocessors. In Proc. of the 20th Euromicro Conf. on Real-Time Systems (ECRTS' 08), pages 181--190, July 2008. Google ScholarGoogle ScholarDigital LibraryDigital Library
  11. T. Kelter and H. Falk and P. Marwedel and S. Chattopadhyay and A. Roychoudhury. Bus-Aware Multicore WCET Analysis Through TDMA Offset Bounds. In Proc. of the 23th Euromicro Conf. on Real-Time Systems (ECRTS' 11), June 2011. Google ScholarGoogle ScholarDigital LibraryDigital Library
  12. S. Schliecker and M. Negrean and R. Ernst. Bounding the Shared Resource Load for the Performance Analysis of Multiprocessor Systems. In Proc. of the Conference on Design, Automation and Test in Europe (DATE' 10), pages 759--764, 2010. Google ScholarGoogle ScholarDigital LibraryDigital Library
  13. S. Schliecker and R. Ernst. Real-time Performance Analysis of Multiprocessor Systems with Shared Memory. ACM Transactions in Embedded Computing Systems, 10(2): 22:1--22:27, January 2011. Google ScholarGoogle ScholarDigital LibraryDigital Library
  14. D. Dasari and B. Anderssom and V. Nelis and S. M. Petters and A. Easwaran and L. Jinkyu. Response Time Analysis of COTS-Based Multicores Considering the Contention on the Shared Memory Bus. In Proc. of the IEEE International Conference on TrustCom '11, Nov 2011. Google ScholarGoogle ScholarDigital LibraryDigital Library
  15. J. Rosen, A. Andrei, P. Eles, and Z. Peng. Bus Access Optimization for Predictable Implementation of Real-Time Applications on Multiprocessor Systems-on-Chip. In Proc. 28th IEEE Real-Time Systems Symposium (RTSS' 07), pages 49--60, December 2007. Google ScholarGoogle ScholarDigital LibraryDigital Library
  16. A. Schranzhofer, R. Pellizzoni, J.-J. Chen, L. Thiele, and M. Caccamo. Worst-case Response Time Analysis of Resource Access Models in Multi-core Systems. In Proc. of the 47th Design Automation Conference (DAC '10), pages 332--337. ACM, 2010. Google ScholarGoogle ScholarDigital LibraryDigital Library
  17. B. Akesson, K. Goossens, and M. Ringhofer. Predator: A Predictable SDRAM Memory Controller. In Int'l Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), pages 251--256, September 2007. Google ScholarGoogle ScholarDigital LibraryDigital Library
  18. A. Hansson, K. Goossens, M. Bekooij, and J. Huisken. CoMPSoC: A template for composable and predictable multi-processor system on chips. ACM Trans. Des. Autom. Electron. Syst., 14(1): 2:1--2:24, January 2009. Google ScholarGoogle ScholarDigital LibraryDigital Library
  19. R. Pellizzoni and A. Schranzhofer and J.-J.Chen and M. Caccamo and L. Thiele. Worst Case Delay Analysis for Memory Interference in Multicore Systems. In Proc. of the Conference on Design, Automation and Test in Europe (DATE' 10), pages 759--764, 2010. Google ScholarGoogle ScholarDigital LibraryDigital Library
  20. S. Bak and G. Yao and R. Pellizzoni and M. Caccamo. Memory-Aware Scheduling of Multicore Task Sets for Real-Time Systems. In Proc. of the IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA '12), 2012. Google ScholarGoogle ScholarDigital LibraryDigital Library
  21. R. Pellizzoni and E. Betti and S. Bak and G. Yao and J. Criswell and M. Caccamo and R. Kegley. A PRedictable Execution Model for Cots-based Embedded Systems. In Proc. of the 17th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS' 11), 2011. Google ScholarGoogle ScholarDigital LibraryDigital Library
  22. H. Yun and G. Yao and R. Pellizzoni and M. Caccamo and L. Sha. Memory- access Control in Multiprocessor for Real-Time Systems with Mixed Criticality. In Proc. of the 24th Euromicro Conf. on Real-Time Systems (ECRTS' 12), July 2012. Google ScholarGoogle ScholarDigital LibraryDigital Library
  23. P4 Series, P4080 multicore processor. cache.freescale.com/-files/netcomm/doc/fact_sheet/QorIQ_P4080.pdf.Google ScholarGoogle Scholar
  24. L. Sha, J. P. Lehoczky, and R. Rajkumar. Solutions for some Practical problems in Prioritised Preemptive Scheduling. In Proc. 7th IEEE Real-Time Systems Symposium (RTSS' 86), pages 181--191, December 1986.Google ScholarGoogle Scholar
  25. J. K. Strosnider, J. P. Lehoczky, and L. Sha. The Deferrable Server Algorithm for Enhanced Aperiodic Responsiveness in Hard Real-time Environments. IEEE Transactions on Computers, 44(1), 1995. Google ScholarGoogle ScholarDigital LibraryDigital Library
  26. R. Inam, J. Mäki-Turja, M. Sjödin, S. M. H. Ashjaei, and S. Afshar. Support for Hierarchical Scheduling in FreeRTOS. In 16th IEEE International Conference on Emerging Technologies and Factory Automation (ETFA' 11), France, September 2011.Google ScholarGoogle Scholar
  27. R. Inam, J. Mäki-Turja, M. Sjödin, and M. Behnam. Hard Real-time Support for Hierarchical Scheduling in FreeRTOS. In 7th Annual Workshop (OSPERT' 11), pages 51--60, Porto, Portugal, July 2011.Google ScholarGoogle Scholar
  28. e500mc Core Reference Manual, rev 1, 2012. cache.-freescale.com/files/32bit/doc/ref_manual/E500MCRM.pdf.Google ScholarGoogle Scholar
  29. R. Inam, M. Sjödin, and M. Jägemar. Bandwidth Measurement using Performance Counters for Predictable Multicore Software. In 17th IEEE International Conference on Emerging Technologies and Factory Automation (ETFA' 12), WiP, pages 1--4, September 2012.Google ScholarGoogle ScholarCross RefCross Ref
  30. Enea AB, Sweden. Data Sheet ENEA OSE 5.5. http://www.enea.com/Documents/Resources/Datasheets/.Google ScholarGoogle Scholar
  31. M. Behnam, T. Nolte, M. Sjödin, and I. Shin. Overrun Methods and Resource Holding Times for Hierarchical Scheduling of Semi-Independent Real-Time Systems. IEEE Transactions on Industrial Informatics, 6(1), February 2010.Google ScholarGoogle ScholarCross RefCross Ref

Recommendations

Comments

Login options

Check if you have access through your login credentials or your institution to get full access on this article.

Sign in

Full Access

PDF Format

View or Download as a PDF file.

PDF

eReader

View online with eReader.

eReader