- 1. G. M. Amdahl, Validity of the Single-Processor Approach to Achieving Large Scale Computing Capabilities, AFIPS Conference Proceedings (1967).Google ScholarDigital Library
- 2. M. Ben-Ari, Principles of Concurrent Programming, Prentice-Hall International, London (1982). Google ScholarDigital Library
- 3. J. A. Clausing, R. Hagstrom, E. L. Lusk, R. A. Overbeek, A Technique for Achieving Portability among Multiprocessors: Implementation on the Lemur, in press, Argonne National Laboratory, Argonne, Illinois (1984).Google Scholar
- 4. W. K. Giloi, Towards a Taxonomy of Computer Architecture Based on the Machine Data Type View, Conference Proceedings - Symposium on Computer Architecture, Institute of Electrical and Electronics Engineers, New York (June, 1983). Google ScholarDigital Library
- 5. James R. Goodman, Using Cache Memory to Reduce Processor-Memory Traffic, Conference Proceedings - Symposium on Computer Architecture, Institute of Electrical and Electronics Engineers, New York (June, 1983). Google ScholarDigital Library
- 6. Kai Hwang, Faye A. Briggs, Computer Architecture and Parallel Processing, McGraw-Hill, Inc., New York (1984). Google ScholarDigital Library
- 7. Daniel P. Siewiorek, C. Gordon Bell, Allen Newell, Computer Structures: Principles and Examples, McGraw-Hill, Inc., New York (1982). Google ScholarDigital Library
Index Terms
- Improvements in multiprocessor system design
Recommendations
A Torus-Based Hierarchical Optical-Electronic Network-on-Chip for Multiprocessor System-on-Chip
Networks-on-chip (NoCs) are emerging as a key on-chip communication architecture for multiprocessor systems-on-chip (MPSoCs). Optical communication technologies are introduced to NoCs in order to empower ultra-high bandwidth with low power consumption. ...
3-D Mesh-Based Optical Network-on-Chip for Multiprocessor System-on-Chip
Optical networks-on-chip (ONoCs) are emerging communication architectures that can potentially offer ultrahigh communication bandwidth and low latency to multiprocessor systems-on-chip (MPSoCs). In addition to ONoC architectures, 3-D integrated ...
Ultra-low-leakage chip multiprocessor design with hybrid FinFET logic styles
FinFET has begun replacing CMOS at the 22nm technology node because of its enhanced ability to mitigate short-channel effects. Although leakage power of FinFET logic gates is lower than their CMOS counterparts, it still contributes to a large part of ...
Comments