A new calibration setup for lock-in amplifiers in the low frequency range and its validation in a bilateral comparison

Lock-in amplifiers [1–4] are instruments that can recover, by homodyne detection, the component at frequency f of a small input signal, possibly corrupted by interference and noise. As vector meters, lock-in amplifiers measure the magnitude and phase of this component. The information about f is provided by the operator with a large signal at the reference input of the instrument.

Lock-in amplifiers are widely employed in experiments as signal recovery instruments, to measure very small signals with amplitudes down to the nanovolt range. They are not designed to be precision instruments: in fact, the typical specifications for the gain accuracy are of the order of percent. A calibration of the lock-in amplifier gain can reduce the measurement uncertainty of many experiments. However, to the authors' knowledge, the literature about the calibration of lock-in amplifiers is scant [5–8].

We describe here a simple setup for the calibration of the gain of a lock-in amplifier, for voltage ranges from 1 µV to 100 µV and frequency from a few hertz to about 1 kHz. These amplitude and frequency ranges are typical in the application of lock-in amplifiers to physics experiments [9–15], in the case of both commercial instruments and purpose-built devices. The evaluation of the system was performed at 1 µV and 10 µV, at 20 Hz and 103 Hz.

The setup herewith described, implemented at the Istituto Nazionale di Ricerca Metrologica (INRIM), was involved in a bilateral international comparison with the Swiss Federal Institute of Metrology (METAS). Two digital lock-in amplifiers were calibrated with both the proposed system and the one developed at METAS [7], with a relative accuracy in the 10⁻⁴ range. The outcome of the comparison is reported and discussed.

The coaxial schematic diagram of the calibration setup is shown in figure 1, and a photograph in figure 2. Table 1 lists the equipment employed.

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A multichannel digital-to-analog converter board G generates large periodic voltage signals at the test frequency f. Channel 1 drives the input of the amplifier A with a low-distortion sine wave. In the following, sinusoidal voltage signals are represented by complex phasors, normalized so that phasor magnitudes correspond to rms values. The rms value |V_S| of the amplifier output voltage V_S is measured by the calibrated voltmeter V. The amplifier drives also the input of an inductive voltage divider IVD set for a ratio k_IVD. The IVD output is further scaled by a factor k_RVD by the resistive voltage divider RVD, composed of the two calibrated resistors R₁ and R₂. The choice of using cascaded IVD and RVD is due to the fact that with two cascaded RVDs there is a larger loading error. On the other hand, an accurate IVD with such a large ratio should be designed on purpose, which is not in the rationale behind this setup. The output voltage V_CAL of RVD, with rms value |V_CAL|, is the calibration signal for the lock-in amplifier DUT. Figure 1 shows the connection of R₂, defined as a four terminal-pair resistor, to a DUT with a differential input. If a single-ended input is available, a four terminal coaxial connection [4] can be employed. Channel 2 of G generates the signal driving the reference input REF of DUT. In the experiments performed, this signal is a symmetric square wave of amplitude 4 V peak to peak. Channel 3 generates a TTL-compatible signal applied to the trigger input EXT TRIG of V.

A personal computer (not shown in figure 1) controls G via a PCI bus, and V, IVD and DUT via a GPIB interface.

The objective of this section is to provide a suitable definition of the magnitude error of the lock-in amplifier and a corresponding measurement model. Other definitions, more general and including the phase error or tailored to specific applications, are possible as well.

The lock-in amplifier DUT determines the input signal with respect to an internal reference signal, which can be shifted with respect to the external reference signal applied to the input REF by a phase angle −φ, settable by the operator. In the setup of figure 1, the external reference phase coincides with that of V_S. Therefore, with respect to the internal reference and compensating for a possible phase error, we can define the calibration signal as

$$\begin{equation}{V}_{\mathrm{C}\mathrm{A}\mathrm{L}}=\vert {k}_{\;\mathrm{R}\mathrm{V}\mathrm{D}}\vert \vert {k}_{\;\mathrm{I}\mathrm{V}\mathrm{D}}\vert \vert {V}_{\mathrm{S}}\vert {\mathrm{e}}^{\;\mathrm{j}\varphi },\end{equation} \tag{ 1 }$$

with

$$\begin{equation}{k}_{\mathrm{R}\mathrm{V}\mathrm{D}}=\frac{1}{1+\frac{{R}_{1}}{{R}_{2}}\left(1+\frac{{R}_{2}}{{R}_{\mathrm{i}\mathrm{n}}}+\mathrm{j}\omega {R}_{2}{C}_{\mathrm{i}\mathrm{n}}\right)}\end{equation} \tag{ 2 }$$

$$\begin{equation}\approx \frac{1}{1+{R}_{1}/{R}_{2}}\frac{1}{1+\mathrm{j}\omega {R}_{2}{C}_{\mathrm{i}\mathrm{n}}},\end{equation} \tag{ 3 }$$

where R_in and C_in represent the parallel input resistance and capacitance of DUT, respectively, including the interconnecting cable capacitance, and ω = 2πf. The last approximation (3) is valid when R_in ≫ R₁ ≫ R₂.

The DUT input voltage V_DUT, which is the differential voltage between the inputs A and B, can be affected by an offset voltage V_OS due to the possible electromagnetic coupling from V_S to V_CAL and those internal to DUT. Thus, V_DUT = V_CAL + V_OS. Under the assumption that V_OS is independent of k_IVD, the measurement can be then performed in two steps, one with k_IVD set to the value of interest, with corresponding reading ${V}_{\mathrm{D}\mathrm{U}\mathrm{T}}^{\mathrm{r}\mathrm{e}\mathrm{a}\mathrm{d}}$, and one with k_IVD set to 0, with corresponding reading ${V}_{\mathrm{O}\mathrm{S}}^{\mathrm{r}\mathrm{e}\mathrm{a}\mathrm{d}}$. The calibration signal read by DUT can be then defined as

$$\begin{equation}{V}_{\mathrm{C}\mathrm{A}\mathrm{L}}^{\mathrm{r}\mathrm{e}\mathrm{a}\mathrm{d}}=\vert {V}_{\mathrm{D}\mathrm{U}\mathrm{T}}^{\mathrm{r}\mathrm{e}\mathrm{a}\mathrm{d}}-{V}_{\mathrm{O}\mathrm{S}}^{\mathrm{r}\mathrm{e}\mathrm{a}\mathrm{d}}\vert {\mathrm{e}}^{\mathrm{j}\varphi }.\end{equation} \tag{ 4 }$$

With the above definitions, the relative magnitude error of DUT is

$$\begin{equation}{\delta }_{\mathrm{R}}=\frac{{V}_{\mathrm{C}\mathrm{A}\mathrm{L}}^{\mathrm{r}\mathrm{e}\mathrm{a}\mathrm{d}}-{V}_{\mathrm{C}\mathrm{A}\mathrm{L}}}{{V}_{\mathrm{C}\mathrm{A}\mathrm{L}}}=\frac{\vert {V}_{\mathrm{D}\mathrm{U}\mathrm{T}}^{\mathrm{r}\mathrm{e}\mathrm{a}\mathrm{d}}-{V}_{\mathrm{O}\mathrm{S}}^{\mathrm{r}\mathrm{e}\mathrm{a}\mathrm{d}}\vert }{\vert {k}_{\mathrm{I}\mathrm{V}\mathrm{D}}{\Vert}{k}_{\mathrm{R}\mathrm{V}\mathrm{D}}{\Vert}{V}_{\mathrm{S}}\vert }-1.\end{equation} \tag{ 5 }$$

The magnitude error can also be defined relatively to the full-scale range V_FS (a positive real quantity) of DUT,

$$\begin{equation}{\delta }_{\mathrm{F}\mathrm{S}}=\frac{\vert {V}_{\mathrm{D}\mathrm{U}\mathrm{T}}^{\mathrm{r}\mathrm{e}\mathrm{a}\mathrm{d}}-{V}_{\mathrm{O}\mathrm{S}}^{\mathrm{r}\mathrm{e}\mathrm{a}\mathrm{d}}\vert -\vert {k}_{\mathrm{I}\mathrm{V}\mathrm{D}}{\Vert}{k}_{\mathrm{R}\mathrm{V}\mathrm{D}}{\Vert}{V}_{\mathrm{S}}\vert }{{V}_{\mathrm{F}\mathrm{S}}}{\mathrm{e}}^{\mathrm{j}\varphi }.\end{equation} \tag{ 6 }$$

In the following, we restrict the analysis to φ set to either 0 or π, such that e^jφ = ±1.

The setup was tested with a popular commercial lock-in amplifier as DUT, the Stanford Research Systems SR850. Table 2 reports the settings of DUT, which were also employed in the comparison described in the referenced section. The generator G was set to synthesize a sine wave with |V_S| = 1 V at the frequencies f = 20 Hz or f = 103 Hz, with 1000 samples per period. The 103 Hz frequency was chosen to avoid interference from the 50 Hz power line. The reading mode XY has been employed.

We tested DUT at the ranges of 1 µV and 10 µV. For the 1 µV range, we chose R₂ = 1 Ω such that k_RVD = 10⁻⁵. For the 10 µV range, we chose R₂ = 10 Ω such that k_RVD = 10⁻⁴. In both cases, during the calibration, k_IVD was then varied from 0.01 to 0.1 in 0.01 steps, typically for both φ = 0 and φ = π.

Figure 3 reports the Allan deviation ${\sigma }_{{V}_{\mathrm{D}\mathrm{U}\mathrm{T}}^{\mathrm{r}\mathrm{e}\mathrm{a}\mathrm{d}}}\left(\tau \right)$ of ${V}_{\mathrm{D}\mathrm{U}\mathrm{T}}^{\mathrm{r}\mathrm{e}\mathrm{a}\mathrm{d}}$ for |V_CAL| = 1 μV at 20 Hz and 103 Hz. Both curves show approximately ${\sigma }_{{V}_{\mathrm{D}\mathrm{U}\mathrm{T}}^{\mathrm{r}\mathrm{e}\mathrm{a}\mathrm{d}}}\left(\tau \right)\propto {\tau }^{-1/2}$ from about 3 s to (200–300) s, typical of white noise. The deviation from the white-noise reference line below 3 s is due to the lock-in filter response and time constant [16]. The same behaviour was observed for |V_CAL| = 10 µV.

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4.1. Traceability and uncertainty

The performance of the INRIM calibration setup proposed in the previous sections was compared with a setup [7] developed by METAS. The comparison was framed within a European Association of National Metrology Institutes (EURAMET) cooperation in research project, no. 1466 [24].

5.1. The METAS calibration setup

The METAS setup shown in figure 4 is based on cascaded IVDs. The three active transformers T1, T2 and T3, described in detail in [7], are two-stage, double-shielded transformers. A very low noise JFET operational amplifier mounted as buffer drives the magnetizing winding; this increases the input impedance of the two-stage transformer, thus avoiding an excessive load that would degrade the ratio of the previous stage. Each active transformer has a 10 : 1 ratio and can work at frequencies from 20 Hz to 10 kHz at a maximum rating of 0.08  V Hz⁻¹. The reference divider (IVD_REF) is a two-stage, single-shielded divider with 8 decades for measurements at 103 Hz. At 20 Hz, a Siemens D521 IVD was used instead to reduce the harmonic distortion of the output signal.

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The two DACs outputs of a PXI board, a National Instruments NI PXI 4461, were used as signal generators, the first one as the voltage source with a signal amplitude of 50 mV. The second output, perfectly synchronous with the first one, was used to generate the reference signal of the lock-in amplifier with a constant signal amplitude of 1 V. Another PXI board, the NI PXI 6220, was used as a clock generator for the voltmeter HP 3458A to ensure synchronization between the voltmeter and the source signal. The voltmeter was used in the digitizing mode to reach an uncertainty of 10 μV V⁻¹ in the 100 mV range, better than that in the AC mode. The amplitude of the signal was calculated with a fast Fourier transform algorithm. At 20 Hz, the sampling frequency of the voltmeter at the EXT TRIG input was 4000 Hz and at 103 Hz, this frequency was 4120 Hz but in both cases, the number of acquired samples was 800. This relatively small number of samples is due to the low reading rate of the voltmeter as the goal was to achieve one measurement per second.

5.2. The comparison

The comparison took place in February 2020 at METAS. The INRIM system was moved there. Two Stanford Research Systems SR850 units (LIA1 and LIA2 in the following) were calibrated by both the INRIM and METAS setups within a short time interval. Each measurement, performed at given range V_FS and frequency f, took about 40 min. The DUT's measurement settings used for this comparison are given in table 2 in section 4.

The outcome of the comparison, in terms of the magnitude errors δ_R and δ_FS, defined by (5) and (6), respectively, is reported for each DUT and both calibration setups in figures 5 and 6. The plots in figure 5 report δ_R and δ_FS at f = 20 Hz while the plots in figure 6 correspond to f = 103 Hz. The results from the INRIM setup are reported in blue, those from the METAS setup in red.

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For each V_FS and f a number of calibration points are presented. The values on the V_CAL axis are determined according to (1): positive values of V_CAL correspond to φ = 0; negative values to φ = π. Due to time constraints, some of the measurements were limited to the positive values of V_CAL.

The error δ_R, which is relative to V_CAL, is approximately independent from V_CAL, whereas the error δ_FS, which is relative to V_FS, is approximately directly proportional to V_CAL. This suggests that the observed magnitude error is mainly due to a gain error of the lock-in amplifiers.

The uncertainty bars in the plots of δ_R and δ_FS corresponding to the INRIM setup are obtained by combining the type B component associated to V_CAL (discussed in section 4) and the type A components associated to the readings ${V}_{\mathrm{D}\mathrm{U}\mathrm{T}}^{\mathrm{r}\mathrm{e}\mathrm{a}\mathrm{d}}$ and ${V}_{\mathrm{O}\mathrm{S}}^{\mathrm{r}\mathrm{e}\mathrm{a}\mathrm{d}}$ (the latter having a magnitude of 1 nV or less). The uncertainty of the METAS setup has been evaluated according with the previously published dedicated paper [7].

In the INRIM setup, the type B uncertainty associated to V_CAL is less than 100 pV (less than 1 × 10⁻⁴ relatively to V_FS), while the type A uncertainty associated to the DUT readings is at the nanovolt level (10⁻⁴–10⁻³ relatively to V_FS). This means that the main contribution to the uncertainty of this calibration is given by the DUT itself. Similar results were obtained with the METAS setup.

The values of δ_R and δ_FS obtained from the INRIM and METAS calibration setups, which are quite different in terms of their implementation, are mostly compatible. A moderate mismatch in the calibration outcome of LIA1, for the specific case of V_FS = 10 µV, can be observed in figure 5(c) (with a compatibility index less than 1.8) and figure 6(c) (with a maximum compatibility index of 3.8 at small magnitudes). This could be related to a possible instability of the specific DUT, since the same mismatch was not observed for LIA2 (figures 5(d) and 6(d)). Overall, both the DUTs were within the manufacturer specifications.

In this paper we presented a simple setup for the gain calibration of lock-in amplifiers which allows to reach a calibration uncertainty of the order of 10⁻⁴, which is better by two orders of magnitude with respect to the typical manufacturer specifications.

The calibration signal is generated by a digital source and scaled down with cascaded inductive and resistive dividers. Commercial components are involved in the construction, and the measurement is automated. The source relative uncertainty is of parts in 10⁵. The calibration uncertainty is limited by the noise and stability of the device under test. The best performances are achievable in the low frequency range (<1 kHz), but extensions to higher frequencies are possible by proper calibration of the dividers and loading effect corrections.

In the framework of the EURAMET project 1466 calibration of lock-in amplifiers, we arranged a bilateral comparison between the setup proposed and an existing one (section 5.1), based on a different design concept that involves purpose-built active transformers. The comparison, performed at METAS, consisted in the calibration of two digital lock-in amplifiers in the same laboratory environment. The outcome of the comparison, whose accuracy was limited by noise and stability of the instruments being calibrated, mutually validates the two calibration setups.

The authors thank Alessandro Mortara, METAS, for his support in the organization of the comparison, and Cristina Cassiago, INRIM, for providing LIA1.