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Fast Adjustable NPN Classification Using Generalized Symmetries

Published:12 April 2019Publication History
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Abstract

NPN classification of Boolean functions is a powerful technique used in many logic synthesis and technology mapping tools in both standard cell and FPGA design flows. Computing the canonical form is the most common approach of Boolean function classification. This article proposes two different hybrid NPN canonical forms and a new algorithm to compute them. By exploiting symmetries under different phase assignment as well as higher-order symmetries, the search space of NPN canonical form computation is pruned and the runtime is dramatically reduced. Nevertheless, the runtime for some difficult functions remains high. Fast heuristic method can be used for such functions to compute semi-canonical forms in a reasonable time. The proposed algorithm can be adjusted to be a slow exact algorithm or a fast heuristic algorithm with lower quality. For exact NPN classification, the proposed algorithm is 40× faster than state-of-the-art. For heuristic classification, the proposed algorithm has similar performance as state-of-the-art with a possibility to trade runtime for quality.

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      • Published in

        cover image ACM Transactions on Reconfigurable Technology and Systems
        ACM Transactions on Reconfigurable Technology and Systems  Volume 12, Issue 2
        June 2019
        117 pages
        ISSN:1936-7406
        EISSN:1936-7414
        DOI:10.1145/3322884
        • Editor:
        • Deming Chen
        Issue’s Table of Contents

        Copyright © 2019 ACM

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        New York, NY, United States

        Publication History

        • Published: 12 April 2019
        • Accepted: 1 February 2019
        • Received: 1 December 2018
        Published in trets Volume 12, Issue 2

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