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Very low power pipelines using significance compression

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Published:01 December 2000Publication History
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  1. 1.D. Brooks and M. Martonosi, "Dynamically Exploiting Narrow Width Operands to Improve Porcessor Power and Performance", in Proc. of 5th. Int. Symp. on High-Perf. Comp. Arch., 1999. Google ScholarGoogle ScholarDigital LibraryDigital Library
  2. 2.D. Burger, T.M. Austin, S. Bennett, Evaluating Future Microprocessors: The SimpleScalar Tool Set, Technical Report CS-TR-96-1308, University of Wisconsin-Madison.Google ScholarGoogle Scholar
  3. 3.G. Cai and C.H. Lim, Architectural Level Power/ Performance Optimization and Dynamic Power Estimation, in the Cool Chips tutorial of the 32nd Int. Symp. on Microarchitecture 1999.Google ScholarGoogle Scholar
  4. 4.K.D. Kissell, MIPS16: High-density MIPS for the Embedded Market, SGI MIPS group, 1997.Google ScholarGoogle Scholar
  5. 5.M. Kozuch and A. Wolfe, Compression of Embedded Systems Programs, in Proc. of the Int. Conf. on Computer Design, 1994 Google ScholarGoogle ScholarDigital LibraryDigital Library
  6. 6.C. Lee, M. Potkonjak and W. H. Mangione-Smith, Mediabench: A Tool for Evaluating and Synthesizing Multimedia and Communications Systems, in Proc. of the 30th Int. Symp. on Microarch., Dec. 1997, pp. 330-335. Google ScholarGoogle ScholarDigital LibraryDigital Library
  7. 7.C.R Lefurgy, E.M Piccininni and Trevor N Mudge, Evaluation of a High Performance Code Compression Method, in Proc. of the 32nd Int. Symp. on Microarchitecture 1999. Google ScholarGoogle ScholarDigital LibraryDigital Library
  8. 8.J. Montanaro and et al. A 160-MHz, 32-b, 0.5 W CMOS RISC Microprocessor, Digital Tech. J'rnal, v.9. Dec, 1997. Google ScholarGoogle ScholarDigital LibraryDigital Library
  9. 9.E. Musoll, Predicting the usefulness of a block result: a micro-architectural technique for high-performance lowpower processors, in Proc. of the 32nd Int. Symp. on Microarchitecture 1999. Google ScholarGoogle ScholarDigital LibraryDigital Library
  10. 10.PowerPC 405CR User Manual, IBM/Motorola, 6/2000.Google ScholarGoogle Scholar
  11. 11.C. Price, MIPS IV Instruction Set, MIPS Tech. Inc, 1995.Google ScholarGoogle Scholar
  12. 12.J. Turley, Thumb Squeezes Arm Code Size, Microprocessor Report, vol 9. n. 4, March 1995.Google ScholarGoogle Scholar
  13. 13.J. Turley, PowerPC Adopts Code Compression, Microprocessor Report, October 1998.Google ScholarGoogle Scholar
  14. 14.S. Manne, A. Klauser and D. Grunwald, Pipeline Gating: Speculation Control for Energy Reduction, in Proc. of the 25 th Int. Symp on Comp. Arch. ,June 1998, pp.132-141. Google ScholarGoogle ScholarDigital LibraryDigital Library
  15. 15.T. Sato and I. Arita, Table Size Reduction for Data Value Predictors by Exploiting Narrow Width Values, in Proc. of the 2000 Int. Conf. on Supercomp., May 2000, pp.196-205. Google ScholarGoogle ScholarDigital LibraryDigital Library
  16. 16.N. Vijaykrishnan, M. Kandemir, M.J. Irwin, S.H. Kim and W. Ye, Energy-Driven Integrated Hardware-Software Optimizations Using SimplePower, in Proc. of the 27 th Int. Symp on Comp. Architecture, 2000, pp. 95-106. Google ScholarGoogle ScholarDigital LibraryDigital Library
  17. 17.T. Wada, S. Rajan and S. Przybylski, An Analytical Access Time Model for On-Chip Cache Memories, IEEE Journal of Solid-State Circuits, v.27, n. 8, pp. 1147-1156, Aug. 1992Google ScholarGoogle Scholar
  18. 18.A. Wolfe and A. Channin, Executing Compressed Programs on an Embedded RISC Architecture, in Proc. of the 19th Int. Symp. on Microarchitecture, 1992. Google ScholarGoogle ScholarDigital LibraryDigital Library

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                  cover image ACM Conferences
                  MICRO 33: Proceedings of the 33rd annual ACM/IEEE international symposium on Microarchitecture
                  December 2000
                  357 pages
                  ISBN:1581131968
                  DOI:10.1145/360128

                  Copyright © 2000 ACM

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                  • Published: 1 December 2000

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                  MICRO 33 Paper Acceptance Rate31of110submissions,28%Overall Acceptance Rate484of2,242submissions,22%

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