Minyoung Kim
Soonhoi Ha
ABSTRACT
This paper presents a new run-time power management technique for real-time embedded systems which consist of a voltage scalable processor and power controllable peripheral devices. We have observed that there exist significant trade-offs in terms of energy consumption between the Dynamic Power Management (DPM) scheme and the Dynamic Voltage Scaling (DVS) scheme over a wide range of system operating conditions. The proposed technique fully exploits workload-variation slack time by partitioning the task into several timeslots and shut down the unneeded peripheral device on timeslot-by-timeslot basis. Through extensive simulations, the novelty and the usefulness of the proposed technique are demonstrated.
- 1.http://www.microsoft.com/hwdev/onnow/Google Scholar
- 2.http://www.teleport.com/~acpiGoogle Scholar
- 3.L. Benini, A. Bogliolo, and G. De Micheli, "A Survey of Design Techniques for System-level Dynamic Power Management", IEEE Transactions on Very Large Scale Integration Systems, Vol. 8, No. 3, pp. 299-316, June, 2000. Google ScholarDigital Library
- 4.Mani B. Srivastava, Anantha P. Chandrakasan, and Robert W. Brodersen, "Predictive System Shutdown and Other Architectural Techniques for Energy Efficient Programmable Computation", IEEE Transactions on VLSI Systems, Vol. 4, NO.1, Mar. 1996. Google ScholarDigital Library
- 5.N. Kim, M.Ryu, S. Hong, M. Saksena, C. Choi, and H. Shin., "Visual assessment of a real-time system design: a case study on a CNC controller", Proc. of IEEE Real-Time Systems Symposium, Dec. 1996. Google ScholarDigital Library
- 6.Seongsoo Lee, and Takayasu Sakurai, "Run-time voltage Hopping for Low-power Real-time Systems", Proc. of Design Automation Conference, 2000. Google ScholarDigital Library
- 7.Thomas D. Burd and Robert W. Brodersen, "Design Issues for Dynamic Voltage Scaling", Proc. of International Symposium on Low Power Electronics and Design, Jul. 2000. Google ScholarDigital Library
- 8.Thomas D. Burd, Trevor A. Pering, Anthony J. Stratakos, and Robert W. Brodersen, "A Dynamic Voltage Scaled Microprocessor System", IEEE International Solid-State Circuits Conference Digest of Technical Papers, pp. 294-295, Feb. 2000Google Scholar
- 9.Thomas D. Burd and Robert W. Brodersen, "Processor Design for Portable Systems", IEEE Transactions on VLSI Systems 1996. Google ScholarDigital Library
- 10.Trevor Pering, Tom Burd, and Robert Brodersen, "The Simulation and Evaluation of Dynamic Voltage Scaling Algorithms", Proc. of I International Symposium on Low Power Electronics and Design, Aug. 1998. Google ScholarDigital Library
- 11.Youngsoo Shin, and Kiyoung Choi, "Power-Conscious Fixed Priority Scheduling for Hard Real-Time Systems", Proc. of Design Automation Conference, 1999. Google ScholarDigital Library
- 12.Yung-Hsiang Lu, Eui-Young Chung, Tajana Simunic, Luca Benini, and Giovanni De Micheli, "Quantitative Comparison of Power Management Algorithms", Proc. of Design Automation and Test In Europe, pp. 20-26, 2000. Google ScholarDigital Library
- 13.Yung-Hsiang Lu, Luca Benini, and Giovanni De Micheli, "Operating-System Directed Power Reduction", Proc. of International Symposium on Low Power Electronics and Design, 2000. Google ScholarDigital Library
- 14.Yung-Hsiang Lu, Luca Benini, and Giovanni De Micheli, "Request-Aware Power Reduction", Proc. of International Symposium on System Synthesis, Sept. 2000. Google ScholarDigital Library
- 15.Won Namgoong, Mengchen Yu, Teresa Meng., "A highefficiency variable-voltage CMOS dynamic dc-dc switching regulator Low-Power CMOS Digital Design", Proceedings of IEEE International Solid-State Circuits Conference, 1997.Google Scholar
Index Terms
- Hybrid Run-time Power Management Technique for Real-time Embedded System with Voltage Scalable Processor
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