2012 Proceeding- General Chair:
- Reinhard Wilhelm,
- Program Chairs:
- Heiko Falk,
- Wang Yi
It is our great pleasure to welcome you to the 13th ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, Tools and Theory for Embedded Systems (LCTES 2012). This year's edition of LCTES continues its tradition of being the premier forum for presentation of research results on leading edge issues of programming languages and compilers, tools for analysis and specification, theory and foundation of embedded systems and novel embedded architectures. The mission of LCTES is to provide a link between the programming languages and the embedded systems engineering communities. Researchers and developers in these areas are addressing many similar problems, but with different backgrounds and approaches. LCTES is intended to expose researchers and developers from either area to relevant work and interesting problems in the other area and provide a forum where they can interact.
The call for papers attracted 66 submissions from Asia, Australia, Europe, North and South America. The program committee accepted 15 papers that cover a variety of topics, including code optimization for real-time systems, parallelization and mapping for multi-cores, profiling-based techniques, programming language semantics and implementation, and design space exploration and program validation. In addition, the program includes two keynote talks: the first one given by Gernot Heiser on trustworthy embedded systems, and the second one on synchronous languages and their compilation by Nicolas Halbwachs. A special session on benchmarking and performance evaluation finally complements the program of LCTES 2012. We hope that these proceedings will serve as a valuable reference for researchers in the compilation and embedded systems domains.
Proceeding Downloads
Rethinking Java call stack design for tiny embedded devices
- Faisal Aslam,
- Ghufran Baig,
- Mubashir Adnan Qureshi,
- Zartash Afzal Uzmi,
- Luminous Fennell,
- Peter Thiemann,
- Christian Schindelhauer,
- Elmar Haussmann
The ability of tiny embedded devices to run large feature-rich programs is typically constrained by the amount of memory installed on such devices. Furthermore, the useful operation of these devices in wireless sensor applications is limited by their ...
Lightweight generics in embedded systems through static analysis
Low-end embedded systems are still programmed in C and assembly, and adopting high-level languages such as C# should reduce the length of their development cycles. For these systems, code size is a major concern, but run-time efficiency should also be ...
Efficiently parallelizing instruction set simulation of embedded multi-core processors using region-based just-in-time dynamic binary translation
Embedded systems, as typified by modern mobile phones, are already seeing a drive toward using multi-core processors. The number of cores will likely increase rapidly in the future. Engineers and researchers need to be able to simulate systems, as they ...
WCET-aware re-scheduling register allocation for real-time embedded systems with clustered VLIW architecture
Worst-Case Execution Time (WCET) is one of the most important metrics in real-time embedded system design. For embedded systems with clustered VLIW architecture, register allocation, instruction scheduling, and cluster assignment are three key ...
WCET-aware data selection and allocation for scratchpad memory
In embedded systems, SPM (scratchpad memory) is an attractive alternative to cache memory due to its lower energy consumption and higher predictability of program execution. This paper studies the problem of placing variables of a program into an SPM ...
A modular memory optimization for synchronous data-flow languages: application to arrays in a lustre compiler
The generation of efficient sequential code for synchronous data-flow languages raises two intertwined issues: control and memory optimization. While the former has been extensively studied, for instance in the compilation of Lustre and Signal, the ...
Mapping a data-flow programming model onto heterogeneous platforms
In this paper we explore mapping of a high-level macro data-flow programming model called Concurrent Collections (CnC) onto heterogeneous platforms in order to achieve high performance and low energy consumption while preserving the ease of use of data-...
FORMLESS: scalable utilization of embedded manycores in streaming applications
Variants of dataflow specification models are widely used to synthesize streaming applications for distributed-memory parallel processors. We argue that current practice of specifying streaming applications using rigid dataflow models, implicitly ...
Profile-guided deployment of stream programs on multicores
Because multicore architectures have become the industry standard, programming abstractions for concurrent programming are of key importance. Stream programming languages facilitate application domains characterized by regular sequences of data, such as ...
Improving dynamic prediction accuracy through multi-level phase analysis
Phase analysis, which classifies the set of execution intervals with similar execution behavior and resource requirements, has been widely used in a variety of dynamic systems, including dynamic cache reconfiguration, prefetching and race detection. ...
Efficient soft error protection for commodity embedded microprocessors using profile information
Successive generations of processors use smaller transistors in the quest to make more powerful computing systems. It has been previously studied that smaller transistors make processors more susceptible to soft errors (transient faults caused by high ...
Compiler-assisted preferred caching for embedded systems with STT-RAM based hybrid cache
As technology scales down, energy consumption is becoming a big problem for traditional SRAM-based cache hierarchies. The emerging Spin-Torque Transfer RAM (STT-RAM) is a promising replacement for large on-chip cache due to its ultra low leakage power ...
"Smart" design space sampling to predict Pareto-optimal solutions
Many high-level synthesis tools offer degrees of freedom in mapping high-level specifications to Register-Transfer Level descriptions. These choices do not affect the functional behavior but span a design space of different cost-performance tradeoffs. ...
An operational semantics for Simulink's simulation engine
The industrial tool Matlab/Simulink is widely used in the design of embedded systems. The main feature of this tool is its ability to model in a common formalism the software and its physical environment. This makes it very useful for validating the ...
Symbolic consistency checking of OpenMp parallel programs
We present a symbolic approach for checking consistency of OpenMP parallel programs. A parallel program is consistent if it yields the same result as its sequential version despite the execution order among threads. We find race conditions of an OpenMP ...
Creating portable, repeatable, realistic benchmarks for embedded systems and the challenges thereof
To appreciate the challenges of analysing embedded processor behaviour, step back in time to understand the evolution of embedded processors. Only a few decades ago, embedded processors were relatively simple devices (compared to today), represented by ...
- Proceedings of the 13th ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, Tools and Theory for Embedded Systems