A Novel Automated Experimental Approach for the Measurement of On-Chip Speed Variations through Dynamic Partial Reconfiguration

In this research we have developed a complete automated experimental setup for the measurement of on-chip delay variations through dynamic partial reconfiguration. The experiment is performed on two different Virtex-5 devices on the basis of which intra-die and inter-die speed comparisons have been made. We developed an on-chip sensor map consisting of 60 sensors out of which only alternating sensors remains active at a time. This is done to avoid affects of inter-sensor heat dissipation. Once finished collecting the data, on-chip processor communicates with the sensor hardware to extract and encode the data, and send it to the online Graphical User Interface implemented on the LabVIEW platform. Afterwards, the processor dynamically loads another bitstream from the Compact Flash Memory Card to activate another alternate group of sensors to perform remaining analysis. While using the same sensor topology we found the intra-die speed variations of up to 6-10%. However, inter-die speed comparison result depicts that one chip is 2-10% faster than another one.