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2015 | OriginalPaper | Chapter

Compact RS(32, 28) Encoder

Authors : Jagannath Samanta, Jaydeb Bhaumik, Soma Barman

Published in: Intelligent Computing and Applications

Publisher: Springer India

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Abstract

Reed–Solomon codes are commonly used to detect and correct errors in digital data during transmission and storage. In this paper, a new optimization algorithm has been proposed which is very simple and efficient for reducing the complexity of the Galois field constant multipliers in terms of XOR2 gates, and hence, the area overhead of RS(32, 28) encoder decreases. RS(32, 28) encoder has been implemented using four optimized constant field multipliers. Using proposed algorithm, the number of XOR2 gates can be reduced by 34.95 and 50.49 %, respectively, for local and global optimization over non-optimized design without affecting its delay. The number of slices and LUT required for FPGA-based design of RS(32, 28) encoder is also reduced compared to unoptimized design.

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Metadata
Title
Compact RS(32, 28) Encoder
Authors
Jagannath Samanta
Jaydeb Bhaumik
Soma Barman
Copyright Year
2015
Publisher
Springer India
Book
Intelligent Computing and Applications

Print ISBN: 978-81-322-2267-5

Electronic ISBN: 978-81-322-2268-2

Copyright Year: 2015

DOI
https://doi.org/10.1007/978-81-322-2268-2_10

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