Delta-Sigma A/D-Converters

The second half of the 20th century has been a remarkable period for technological innovation, and particularly so for telecommunications. During the first half of the last century, telecommunications was almost entirely in the analog mode. Digital transmission of voice and low-speed data communications were the first ventures into digital transmission along a twisted pair telephone line. The invention of the transistor and the subsequent innovation of integrated circuits quickly led to a revolution in electronics and in communications in general. The rapid development of computer and consumer electronics, traditional telephone subscribers are ready for new services based on digital technologies. Driven by the deregulation in the telecommunications industry and the vast growth rate of internet users, world wide industry has made enormous efforts to deploy and standardize a multitude of various different access technologies ranging from media such as air, twisted-pair copper cables, coax cables and optical fibers. Applications such as video conferencing, fast internet downloads, digital television and tele-working have been made available to the public with wide coverage. With a powerful PC processing lots of information, the capability of a voice band modem becomes a limiting factor. The voice channel is limited by the 3.1 kHz band bottlenecking the achievable data-rate for integrating consumers to the evolving high-speed digital communication network. The drawback of a telephone modem can be overcome with the Digital Subscriber Line (DSL) technology. There were several key innovations such as Integrated Service Digital Network (ISDN) and High bit-rate Digital Subscriber Line (HDSL) that led to an application for a system that transmitted to the customer at a high data-rate for supporting entertainment features such as video on demand or simple download of any desired data. The emerging market ultimately led to the conception of the Asymmetric Digital Subscriber Line (ADSL). ADSL allows for simultaneous transmission of digital data and Plain-Old Telephone Service (POTS) signal on a twisted-pair wire. This fact turned out to be one of the success factors during the commercial launch of this product since it could be easily put on top of the already widely spreaded POTS system.

This chapter gives an brief overview of A/D-conversion focusing on delta-sigma modulators. For a comprehensive analysis of delta-sigma converters the reader is referred to later mentioned references. The sampling and quantization of analog signals is briefly discussed. The main converter specification items are introduced. Next, the principle of oversampling and delta-sigma conversion is covered followed by some architectural aspects and implementation approaches. Pulse-width modulation will be introduced based on a delta-sigma modulator for low voltage applications. Finally, the impact on jitter for A/D-conversion is briefly discussed.

A high-resolution multi-bit Delta-Sigma ADC implemented in a 0.18 μm CMOS technology is introduced [47]. The circuit is targeted for an ADSL Central-Office application. An area- and power-efficient realization of a single-loop modulator consisting of a 2nd-order loopfilter and a 3-bit quantizer with an oversampling-ratio of 96 is presented. The delta-sigma modulator features an 85 dB dynamic-range (DR) over a 300 kHz signal bandwidth. The measured power consumption of the ADC core is 15 mW only. An innovative biasing circuitry is introduced for the switched-capacitor integrators. The FOM taking the DR as reference (2.​7) results in \(1.8~\frac{\mathrm{pJ}}{\mathrm{conv}}\).

The growing market for broadband access services is the driving force for Digital Subscriber Line (DSL) applications. As illustrated in Fig. 1.​1, DSL allows for simultaneous transmission of digital data and the Plain-Old Telephone Service (POTS) signal on a single copper-pair. Among several DSL approaches the Asymmetric Digital Subscriber Line (ADSL) technology was standardized. Generally, ADSL can transport more than 8 Mbit/s from the Central Office (CO) to the customer (downstream) and more than 1 Mbit/s upstream. As shown in Table 1.​1, several options were standardized such as ADSL+ to offer a higher bit-rate for downstream at the cost of reduced subscriber loop-length. Furthermore, line-testing features were introduced for performance monitoring requiring an analog bandwidth up to 1.1 MHz for the A/D-converter.

Modern CMOS technologies employ the high-speed performances of nanoscale transistors. The possible supply voltage results in typically one Volts for a device consisting of a gate-oxide thickness of about 1.2 nm. One of the main challenges is the implementation of the multi-bit quantizer with an array of comparators resulting in a flash-converter. The performance of these converters is bounded by the tolerable limit for the power consumption of the flash-converter embedded in multi-bit architectures. This flash-converter is quite problematic to realize in low-voltage technologies, where the dynamic range of the comparators is limited and comparator offset degrades the linearity of the quantizer. Furthermore, a multi-bit D/A-converter is required in the feedback path whereas its impairments limit the overall performance.

In general, A/D-converters are divided into two broad categories: Nyquist-rate converters and over-sampling converters. These different converter classes typically offer different compromises between ADC resolution and output sampling rate. Nyquist-rate converters are those that operate at a minimum sampling frequency necessary to capture all the information about the entire input bandwidth. Three of the most popular Nyquist-rate converter architectures are SAR (successive approximation register), flash and pipeline ADCs. Basically, Nyquist-rate converters are used in open-loop configuration without any global feedback. A constant input during the conversion process usually is provided in each stage by a sample-and-hold (SHA) circuit. The first-stage SHA must maintain the accuracy of the overall ADC at the full sampling rate, requiring the circuit to settle within a single clock period. In contrast, oversampled delta-sigma A/D-converters do not require highly accurate settling circuits as compared to Nyquiste-rate converters and thus avoid the increased power drain and need for high-performance drivers in high-resolution applications. This advantage comes mainly from the global feedback structure providing noise-shaping in the frequency domain at the expense of a limited band-of-interest defined by the Over-Sampling Ratio (OSR). Nevertheless, CT delta-sigma modulators may also include significant anti-aliasing filtering, reducing or eliminating the need for an additional anti-aliasing-filter. Finally, CT delta-sigma technology is well-suited for migration to future CMOS processes.