Skip to main content
Top

2016 | OriginalPaper | Chapter

Multiple Inputs Combinational Logic Minimization by Minterms Set

Authors : Sahadev Roy, Rajesh Saha, Chandan Tilak Bhunia

Published in: Proceedings of the International Conference on Recent Cognizance in Wireless Communication & Image Processing

Publisher: Springer India

Activate our intelligent search to find suitable subject content or patents.

search-config
loading …

Abstract

The paper presents an easy technique to simplify multiple inputs combinational digital logic circuits. By grouping of minterms in different sets, multiple inputs can be easily synthesized. The proposed technique is an exact method of minimization. The new approach reduces the minimization complexity of combinational circuits. The proposed method is fast, can be solved by paper–pen, and also by computer programming.

Dont have a licence yet? Then find out more about our products and how to get one now:

Springer Professional "Wirtschaft+Technik"

Online-Abonnement

Mit Springer Professional "Wirtschaft+Technik" erhalten Sie Zugriff auf:

  • über 102.000 Bücher
  • über 537 Zeitschriften

aus folgenden Fachgebieten:

  • Automobil + Motoren
  • Bauwesen + Immobilien
  • Business IT + Informatik
  • Elektrotechnik + Elektronik
  • Energie + Nachhaltigkeit
  • Finance + Banking
  • Management + Führung
  • Marketing + Vertrieb
  • Maschinenbau + Werkstoffe
  • Versicherung + Risiko

Jetzt Wissensvorsprung sichern!

Springer Professional "Technik"

Online-Abonnement

Mit Springer Professional "Technik" erhalten Sie Zugriff auf:

  • über 67.000 Bücher
  • über 390 Zeitschriften

aus folgenden Fachgebieten:

  • Automobil + Motoren
  • Bauwesen + Immobilien
  • Business IT + Informatik
  • Elektrotechnik + Elektronik
  • Energie + Nachhaltigkeit
  • Maschinenbau + Werkstoffe




 

Jetzt Wissensvorsprung sichern!

Springer Professional "Wirtschaft"

Online-Abonnement

Mit Springer Professional "Wirtschaft" erhalten Sie Zugriff auf:

  • über 67.000 Bücher
  • über 340 Zeitschriften

aus folgenden Fachgebieten:

  • Bauwesen + Immobilien
  • Business IT + Informatik
  • Finance + Banking
  • Management + Führung
  • Marketing + Vertrieb
  • Versicherung + Risiko




Jetzt Wissensvorsprung sichern!

Literature
1.
go back to reference Veitch, E.W.: A chart method for simplifying truth functions. In: Transactions of the 1952 ACM Annual Meeting, ACM Annual Conference/Annual Meeting “Pittsburgh”, pp. 127–133. ACM, NY (1952) Veitch, E.W.: A chart method for simplifying truth functions. In: Transactions of the 1952 ACM Annual Meeting, ACM Annual Conference/Annual Meeting “Pittsburgh”, pp. 127–133. ACM, NY (1952)
2.
go back to reference Karnaugh, M.: The map method for synthesis of combinational logic circuits. AIEE Committee on Technical Operations for presentation at the AIEE summer General Meeting, Atlantic City, NJ, pp. 593–599 (1953) Karnaugh, M.: The map method for synthesis of combinational logic circuits. AIEE Committee on Technical Operations for presentation at the AIEE summer General Meeting, Atlantic City, NJ, pp. 593–599 (1953)
5.
go back to reference Faber, W., Leone, N., Pfeifer, G., Ricca, F.: On look-ahead heuristics in disjunctive logic programming. Ann. Math. Artif. Intell. 51(2–4), 229–266 (2007)MathSciNetCrossRefMATH Faber, W., Leone, N., Pfeifer, G., Ricca, F.: On look-ahead heuristics in disjunctive logic programming. Ann. Math. Artif. Intell. 51(2–4), 229–266 (2007)MathSciNetCrossRefMATH
6.
go back to reference Kunz, W., Stoffel, D., Menon, P.R.: Logic optimization and equivalence checking by implication analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16(3), 266–281 (1997)CrossRef Kunz, W., Stoffel, D., Menon, P.R.: Logic optimization and equivalence checking by implication analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16(3), 266–281 (1997)CrossRef
9.
go back to reference Shui, Y., Wei, X., Almaini, A.E.A.: Power minimization of FPRM functions based on polarity conversion. J. Comput. Sci. Technol. 18(3), 325–331 (2003)CrossRefMATH Shui, Y., Wei, X., Almaini, A.E.A.: Power minimization of FPRM functions based on polarity conversion. J. Comput. Sci. Technol. 18(3), 325–331 (2003)CrossRefMATH
10.
go back to reference Panda, R., Najm, F.: Technology decomposition for low power synthesis. In: IEEE Custom Integrated Circuits Conference, Santa Clara, California, USA, pp.650–655 (1997) Panda, R., Najm, F.: Technology decomposition for low power synthesis. In: IEEE Custom Integrated Circuits Conference, Santa Clara, California, USA, pp.650–655 (1997)
12.
go back to reference Roy, S., Bhunia, C.T.: Minimization algorithm for multiple input to two input variables. In: Proceedings of the 2014 International Conference on Control, Instrumentation, Energy and Communication (CIEC), pp. 555–557 (2014). doi:10.1109/CIEC.2014.6959150 Roy, S., Bhunia, C.T.: Minimization algorithm for multiple input to two input variables. In: Proceedings of the 2014 International Conference on Control, Instrumentation, Energy and Communication (CIEC), pp. 555–557 (2014). doi:10.​1109/​CIEC.​2014.​6959150
Metadata
Title
Multiple Inputs Combinational Logic Minimization by Minterms Set
Authors
Sahadev Roy
Rajesh Saha
Chandan Tilak Bhunia
Copyright Year
2016
Publisher
Springer India
DOI
https://doi.org/10.1007/978-81-322-2638-3_15